Page 5 - Table of Contents
www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Preface: About This Guide Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Additional Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 6 - Chapter 5: Synthesizing a Design; Chapter 6: Implementing a Design; Chapter 7: Timing Simulation
PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 www.xilinx.com Chapter 5: Synthesizing a Design Synplicity Synplify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Verilog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 7 - Preface; About This Guide; Guide Contents
PCI v3.0.151 Getting Started Guide www.xilinx.com 7 UG157 August 31, 2005 R Preface About This Guide The PCI Getting Started Guide provides information about the LogiCORE™ Peripheral Component Interconnect (PCI) interface, which provides a fully verified, pre-implemented PCI bus interface available ...
Page 8 - Additional Resources; Typographical
8 www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Preface: About This Guide R Additional Resources For additional information, go to http://support.xilinx.com . The following table lists some of the resources you can access from this website. You can also directly access thes...
Page 9 - Online Document
PCI v3.0.151 Getting Started Guide www.xilinx.com 9 UG157 August 31, 2005 Conventions R Online Document The following conventions are used in this document: Italic font Variables in a syntax statement for which you must supply values ngdbuild design_name References to other manuals See the Developme...
Page 11 - Chapter 1; Getting Started; About the Example Design; Additional Documentation
PCI v3.0.151 Getting Started Guide www.xilinx.com 11 UG157 August 31, 2005 R Chapter 1 Getting Started The PCI interface provides a fully verified, pre-implemented PCI bus interface available in both 32-bit and 64-bit versions with support for operation at 33 MHz and 66 MHz. This guide defines the s...
Page 12 - Technical Support; Feedback; PCI Interface Core
12 www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Chapter 1: Getting Started R Technical Support For technical support, visit www.xilinx.com/support . Questions are routed to a team of engineers with expertise using the PCI interface. Xilinx provides technical support for us...
Page 13 - Chapter 2; Installing and Licensing the Core; System Requirements; Installing the Core
PCI v3.0.151 Getting Started Guide www.xilinx.com 13 UG157 August 31, 2005 R Chapter 2 Installing and Licensing the Core This chapter provides instructions for installing and obtaining a license for the PCI interface core, which you must do before using it in your designs. The PCI core is provided u...
Page 14 - CORE Generator IP Updates Installer; Manual Installation: CORE Generator IP Update
14 www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Chapter 2: Installing and Licensing the Core R CORE Generator IP Updates Installer 1. From the CORE Generator main GUI, choose Tools > Updates Installer to start the Updates Installer. 2. If prompted for a proxy host, cont...
Page 15 - Direct Download of Standalone Core
PCI v3.0.151 Getting Started Guide www.xilinx.com 15 UG157 August 31, 2005 Installing the Core R the location of the Xilinx installation. Note that you may need system administrator privileges to install the update. 6. Confirm the directory structure in one of the following ways: • For Windows: <...
Page 16 - Licensing Options; Evaluation; Obtaining a Full License; Direct Download
16 www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Chapter 2: Installing and Licensing the Core R Licensing Options Evaluation The method for obtaining an evaluation license is determined by the version of the PCI core you choose. • For the PCI32/33 Virtex™ and Spartan™ core,...
Page 17 - Installing Your License File
PCI v3.0.151 Getting Started Guide www.xilinx.com 17 UG157 August 31, 2005 Installing Your License File R Installing Your License File After selecting a license option, an email will be sent to you that includes instructions for installing your license file. In addition, information about advanced l...
Page 19 - Chapter 3; Family Specific Considerations; Design Support
PCI v3.0.151 Getting Started Guide www.xilinx.com 19 UG157 August 31, 2005 R Chapter 3 Family Specific Considerations This chapter provides important design information specific to the PCI interface targeting Virtex and Spartan devices. Design Support Table 3-1 provides a list of supported device an...
Page 28 - Wrapper Files; Constraints Files
28 www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Chapter 3: Family Specific Considerations R Wrapper Files Wrapper files contain an instance of the PCI interface and the instances of all I/O elements used by the PCI interface. Each wrapper file is specific to a particular P...
Page 29 - Device Initialization; Bus Width Detection
PCI v3.0.151 Getting Started Guide www.xilinx.com 29 UG157 August 31, 2005 Device Initialization R Device Initialization Immediately after FPGA configuration, both the PCI interface and the user application are initialized by the startup mechanism present in all Virtex and Spartan devices. During no...
Page 30 - Datapath Output Clock Enable
30 www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Chapter 3: Family Specific Considerations R Although this technique is not technically compliant with the PCI specification due to the extra loading on REQ64# and RST# , the use of a large series resistor helps minimize this ...
Page 32 - Regional Clock Usage
32 www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Chapter 3: Family Specific Considerations R 1. The jitter of the source clock, to determine if it is appropriate for use as an input to a DCM. 2. The DCM configuration, to generate a 200 MHz clock on any appropriate DCM outpu...
Page 34 - Bus Clock Usage
34 www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Chapter 3: Family Specific Considerations R Bus Clock Usage The bus clock output provided by the interface is derived from the bus clock input, and is distributed using a global clock buffer. The interface itself is fully syn...
Page 35 - Electrical Compliance
PCI v3.0.151 Getting Started Guide www.xilinx.com 35 UG157 August 31, 2005 Electrical Compliance R maximum allowed frequency, and the frequency may change on a cycle-by-cycle basis. Under certain conditions, the PCI core may also apply phase shifts to this clock. For these reasons, the user applicat...
Page 36 - REGION
36 www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Chapter 3: Family Specific Considerations R Figure 3-3 shows the small range of supply voltage values where V IL or V IH are technically non-compliant. Note that this may occur with any PCI device if the input buffer supply v...
Page 37 - Generating Bitstreams
PCI v3.0.151 Getting Started Guide www.xilinx.com 37 UG157 August 31, 2005 Generating Bitstreams R Figure 3-4 shows one possible low-cost solution to generate the required 3.0 volt output driver supply. Xilinx recommends the use of the circuit shown in Figure 3-4 , although other approaches using ot...
Page 39 - Chapter 4; Functional Simulation
PCI v3.0.151 Getting Started Guide www.xilinx.com 39 UG157 August 31, 2005 R Chapter 4 Functional Simulation This chapter describes how to simulate the ping64 example design with global clocks using the supported functional simulation tools. For the PCI 32 interface, substitute ping32 for ping64 . I...
Page 40 - Verilog
40 www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Chapter 4: Functional Simulation R Most of the files listed are related to the example design and its testbench. For other testbenches, the following subset must be used for proper simulation of the PCI interface: ../source/g...
Page 41 - VHDL
PCI v3.0.151 Getting Started Guide www.xilinx.com 41 UG157 August 31, 2005 Model Technology ModelSim R 3. Modify the library search path by changing <Xilinx Install Path> to match the Xilinx installation directory and then save the file. Most of the files listed are related to the example desi...
Page 43 - Chapter 5; Synthesizing a Design
PCI v3.0.151 Getting Started Guide www.xilinx.com 43 UG157 August 31, 2005 R Chapter 5 Synthesizing a Design This chapter describes how to synthesize the ping64 example design with global clocks using the supported synthesis tools. For the PCI 32 interface, substitute ping32 for ping64 . If you are ...
Page 51 - Exemplar LeonardoSpectrum
PCI v3.0.151 Getting Started Guide www.xilinx.com 51 UG157 August 31, 2005 Exemplar LeonardoSpectrum R 12. From the main project window, click Change Target to display the Options for Implementation dialog box, as shown in Figure 5-17 . 13. On the Device tab, set the Technology, Part, Speed, and Pac...
Page 52 - Xilinx XST
52 www.xilinx.com PCI v3.0.151 Getting Started Guide UG157 August 31, 2005 Chapter 5: Synthesizing a Design R The end result of the synthesis step is an EDIF file that is fed into the Xilinx implementation tools during the implementation step. In practice, the provided script file must be modified t...
Page 53 - Chapter 6; Implementing a Design
PCI v3.0.151 Getting Started Guide www.xilinx.com 53 UG157 August 31, 2005 R Chapter 6 Implementing a Design This chapter describes how to implement the ping64 example design with global clocks using the supported FPGA implementation tools (included with the ISE Foundation v7.1 Development System). ...
Page 55 - Chapter 7; Timing Simulation
PCI v3.0.151 Getting Started Guide www.xilinx.com 55 UG157 August 31, 2005 R Chapter 7 Timing Simulation This chapter describes how to perform timing simulation using the ping64 example design with global clocks using the supported timing simulation tools. For the PCI 32 interface, substitute ping32...
