Cypress STK22C48 - Manuals - manualsarea.com

Page 2 - Pin Configurations; Top View

STK22C48 Document Number: 001-51000 Rev. ** Page 2 of 14 Pin Configurations Figure 1. Pin Diagram - 28-Pin SOIC Table 1. Pin Definitions Pin Name Alt IO Type Description A 0 –A 10 Input Address Inputs. Used to select one of the 2,048 bytes of the nvSRAM. DQ 0 -DQ 7 Input or Output Bidirectional Data...

Page 3 - Figure 2; WRITE; AutoStore Inhibit mode; Figure 3; Figure 2. AutoStore Mode

STK22C48 Document Number: 001-51000 Rev. ** Page 3 of 14 Device Operation The STK22C48 nvSRAM is made up of two functional compo-nents paired in the same physical cell. These are an SRAMmemory cell and a nonvolatile QuantumTrap cell. The SRAMmemory cell operates as a standard fast static RAM. Data i...

Page 4 - Figure 3. AutoStore Inhibit Mode; Data Protection; Figure 4

STK22C48 Document Number: 001-51000 Rev. ** Page 4 of 14 Figure 3. AutoStore Inhibit Mode Hardware STORE (HSB) Operation The STK22C48 provides the HSB pin for controlling andacknowledging the STORE operations. The HSB pin is used torequest a hardware STORE cycle. When the HSB pin is drivenLOW, the S...

Page 6 - DC Electrical Characteristics

STK22C48 Document Number: 001-51000 Rev. ** Page 6 of 14 Maximum Ratings Exceeding maximum ratings may shorten the useful life of thedevice. These user guidelines are not tested. Storage Temperature ................................. –65 ° C to +150 ° C Temperature under bias............................

Page 7 - Capacitance; Thermal Resistance; AC Test Conditions

STK22C48 Document Number: 001-51000 Rev. ** Page 7 of 14 Capacitance In the following table, the capacitance parameters are listed. [5] Parameter Description Test Conditions Max Unit C IN Input Capacitance T A = 25 ° C, f = 1 MHz, V CC = 0 to 3.0V 8 pF C OUT Output Capacitance 7 pF Thermal Resistanc...

Page 8 - AC Switching Characteristics; SRAM Read Cycle; Switching Waveforms

STK22C48 Document Number: 001-51000 Rev. ** Page 8 of 14 AC Switching Characteristics SRAM Read Cycle Parameter Description 25 ns 45 ns Unit Min Max Min Max Cypress Parameter Alt t ACE t ELQV Chip Enable Access Time 25 45 ns t RC [6] t AVAV, t ELEH Read Cycle Time 25 45 ns t AA [7] t AVQV Address Ac...

Page 9 - SRAM Write Cycle

STK22C48 Document Number: 001-51000 Rev. ** Page 9 of 14 SRAM Write Cycle Parameter Description 25 ns 45 ns Unit Min Max Min Max Cypress Parameter Alt t WC t AVAV Write Cycle Time 25 45 ns t PWE t WLWH, t WLEH Write Pulse Width 20 30 ns t SCE t ELWH, t ELEH Chip Enable To End of Write 20 30 ns t SD ...

Page 11 - Hardware STORE Cycle; Switching Waveform

STK22C48 Document Number: 001-51000 Rev. ** Page 11 of 14 Hardware STORE Cycle Parameter Alt Description STK22C48 Unit Min Max t DHSB [13, 16] t RECOVER, t HHQX Hardware STORE High to Inhibit Off 700 ns t PHSB t HLHX Hardware STORE Pulse Width 15 ns t HLBL Hardware STORE Low to STORE Busy 300 ns Swi...

Page 12 - Ordering Information; Ordering Code; Commercial

STK22C48 Document Number: 001-51000 Rev. ** Page 12 of 14 Ordering Information Speed (ns) Ordering Code Package Diagram Package Type Operating Range 25 STK22C48-NF25TR 51-85026 28-pin SOIC (300 mil) Commercial STK22C48-NF25 51-85026 28-pin SOIC (300 mil) STK22C48-SF25TR 51-85058 28-pin SOIC (330 mil...

Page 13 - Package Diagrams

STK22C48 Document Number: 001-51000 Rev. ** Page 13 of 14 Package Diagrams Figure 13. 28-Pin (300 mil) SOIC (51-85026) Figure 14. 28-Pin (330 mil) SOIC (51-85058) PIN 1 ID 0.291[7.39] 0.300[7.62] 0.394[10.01] 0.419[10.64] 0.050[1.27] TYP. 0.092[2.33] 0.105[2.67] 0.004[0.10] 0.0118[0.30] SEATING PLAN...

Page 14 - Document History Page; Worldwide Sales and Design Support; Change

Document Number: 001-51000 Rev. ** Revised January 30, 2009 Page 14 of 14 AutoStore and QuantumTrap are registered trademarks of Cypress Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respectiveholders. STK22C48 © Cypress Semicondu...