Page 2 - SS
STK14D88 Document Number: 001-52037 Rev. ** Page 2 of 17 Pin Configurations Figure 1. Pin Diagram 48-Pin SSOP/32-SOIC Pin Descriptions Pin Name I/O Description A 14 -A 0 Input Address : The 15 address inputs select one of 32,768 bytes in the nvSRAM array DQ 7 -DQ 0 I/O Data : Bi-directional 8-bit da...
Page 3 - Absolute Maximum Ratings; DC Characteristics; STORE
STK14D88 Document Number: 001-52037 Rev. ** Page 3 of 17 Absolute Maximum Ratings Voltage on Input Relative to Ground................. –0.5V to 4.1V Voltage on Input Relative to V SS ...........–0.6V to (V CC + 0.5V) Voltage on DQ 0-7 or HSB ......................–0.5V to (V CC + 0.5V) Temperature u...
Page 4 - Figure 2
STK14D88 Document Number: 001-52037 Rev. ** Page 4 of 17 V OL Output Logic “0” Voltage 0.4 0.4 V I OUT = 4mA T A Operating Temperature 0 70 - 40 85 ° C V CC Operating Voltage 2.7 3.6 2.7 3.6 V 3.3V +20%, -10% V CAP Storage Capacitance 17 120 17 120 μ F Between V CAP pin and V SS , 5V Rated DATA R Da...
Page 7 - AutoStore/POWER UP RECALL; RECALL
STK14D88 Document Number: 001-52037 Rev. ** Page 7 of 17 AutoStore/POWER UP RECALL No. Symbols Alt. Parameter STK14D88 Unit Notes Min Max 22 t RECALL Power up RECALL Duration 20 ms 10 23 t STORE t HLHZ STORE Cycle Duration 12.5 ms 11, 12 24 V SWITCH Low Voltage Trigger Level 2.65 V 25 V CCRISE Vcc R...
Page 9 - Hardware STORE Cycle; Soft Sequence Commands
STK14D88 Document Number: 001-52037 Rev. ** Page 9 of 17 Hardware STORE Cycle NO. Symbols Parameter STK14D88 Unit Notes Standard Alternate Min Max 31 t DELAY t HLQZ Hardware STORE to SRAM Disabled 1 70 µs 15 32 t HLHX Hardware STORE Pulse Width 15 ns Figure 10. Hardware STORE Cycle 32 23 31 Soft Seq...
Page 10 - Mode Selection; Mode
STK14D88 Document Number: 001-52037 Rev. ** Page 10 of 17 Mode Selection E W G A 14 –A 0 Mode IO Power Notes H X X X Not Selected Output High Z Standby L H L X Read SRAM Output Data Active L L X X Write SRAM Input Data Active L H L 0x0E38 0x31C7 0x03E0 0x3C1F 0x303F0x03F8 Read SRAMRead SRAMRead SRAM...
Page 11 - nvSRAM Operation; nvSRAM; Figure 12. AutoStore Mode; Software STORE
STK14D88 Document Number: 001-52037 Rev. ** Page 11 of 17 nvSRAM Operation nvSRAM The STK14D88 nvSRAM is made up of two functional compo-nents paired in the same physical cell. These are the SRAMmemory cell and a nonvolatile QuantumTrap™ cell. The SRAMmemory cell operates like a standard fast static...
Page 13 - Figure 13. Current versus Cycle Time; Noise Considerations; Preventing AutoStore; AutoStore Disable; er; Writes
STK14D88 Document Number: 001-52037 Rev. ** Page 13 of 17 Figure 13. Current versus Cycle Time Noise Considerations The STK14D88 is a high-speed memory and so must have ahigh-frequency bypass capacitor of 0.1 µF connected betweenboth V CC pins and V SS ground plane with no plane break to chip V SS ....
Page 14 - Part Number
STK14D88 Document Number: 001-52037 Rev. ** Page 14 of 17 Ordering Codes Part Numbering Nomenclature Packaging Option:TR = Tape and ReelBlank = Tube Speed:25 - 25 ns35 - 35 ns Package:N = Plastic 32-pin 300 mil SOIC (50 mil pitch) Temperature Range: Blank - Commercial (0 to 70°C) R = Plastic 48-pin ...
Page 15 - Package Diagrams; PIN 1 ID; REFERENCE JEDEC MO-119
STK14D88 Document Number: 001-52037 Rev. ** Page 15 of 17 Package Diagrams Figure 14. 32-Pin (300 Mil) SOIC (51-85127) PIN 1 ID SEATING PLANE 1 16 17 32 DIMENSIONS IN INCHES[MM] MIN.MAX. 0.292[7.416]0.299[7.594] 0.405[10.287]0.419[10.642] 0.050[1.270] TYP. 0.090[2.286]0.100[2.540] 0.004[0.101]0.0100...
Page 17 - Document History Page; Worldwide Sales and Design Support
Document Number: 001-52037 Rev. ** Revised March 02, 2009 Page 17 of 17 AutoStore and QuantumTrap are registered trademarks of Cypress Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respectiveholders. STK14D88 © Cypress Semiconduct...