Cypress CY7C68003 - Manuals

CY7C68003 Page 2 of 5 Functional Overview UTMI+ Low Pin Interface (ULPI) This block conforms to the ULPI Specification. It supports the8-bit wide SDR data path. The primary IOs of this block supportmulti-range LVCMOS signaling from 1.8V to 3.3V (±5%). Thelevel used is automatically selected by the v...

CY7C68003 Page 3 of 5 Clocking TX2UL supports external crystal and clock inputs at the 13, 19.2,24, and 26 MHz frequencies. The internal PLL applies the properclock multiply option depending on the input frequency. For appli-cations that use an external clock source to drive XI, the XO pin(in 24-pin...

CY7C68003 Page 4 of 5 Operation Modes There are six operation modes available in TX2UL. They are: ■ Normal Operation Mode ■ Configuration Mode ■ ULPI Low Power Mode ■ Sleep Mode ■ Carkit UART Pass Through Mode ■ Tri-state ULPI Interface Output Mode (only available in 24-pin QFN package) When changin...