Page 2 - Unit
CY7C1339G Document #: 38-05520 Rev. *F Page 2 of 18 Pin Configurations Selection Guide 250 MHz 200 MHz 166 MHz 133 MHz Unit Maximum Access Time 2.6 2.8 3.5 4.0 ns Maximum Operating Current 325 265 240 225 mA Maximum CMOS Standby Current 40 40 40 40 mA A A A A A 1 A 0 N C /72M NC/36M V SS V DD NC/18 ...
Page 5 - DD; ZZ Mode Electrical Characteristics
CY7C1339G Document #: 38-05520 Rev. *F Page 5 of 18 signal. Consecutive single Read cycles are supported. Oncethe SRAM is deselected at clock rise by the chip select andeither ADSP or ADSC signals, its output will tri-state immedi-ately. Single Write Accesses Initiated by ADSP This access is initiat...
Page 6 - Truth Table
CY7C1339G Document #: 38-05520 Rev. *F Page 6 of 18 Truth Table [2, 3, 4, 5, 6, 7] Operation Add. Used CE 1 CE 2 CE 3 ZZ ADSP ADSC ADV WRITE OE CLK DQ Deselect Cycle, Power-down None H X X L X L X X X L-H Tri-State Deselect Cycle, Power-down None L L X L L X X X X L-H Tri-State Deselect Cycle, Power...
Page 7 - Partial Truth Table for Read/Write
CY7C1339G Document #: 38-05520 Rev. *F Page 7 of 18 Partial Truth Table for Read/Write [2, 8] Function GW BWE BW D BW C BW B BW A Read H H X X X X Read H L H H H H Write Byte A – DQ A H L H H H L Write Byte B – DQ B H L H H L H Write Bytes B, A H L H H L L Write Byte C– DQ C H L H L H H Write Bytes ...
Page 8 - Electrical Characteristics
CY7C1339G Document #: 38-05520 Rev. *F Page 8 of 18 Maximum Ratings (Above which the useful life may be impaired. For user guide-lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature withPower Applied ..............................................
Page 10 - Switching Characteristics
CY7C1339G Document #: 38-05520 Rev. *F Page 10 of 18 Switching Characteristics Over the Operating Range [12, 13, 14, 15, 16, 17] Parameter Description –250 –200 –166 –133 Unit Min. Max. Min. Max. Min. Max. Min. Max. t POWER V DD (Typical) to the first Access [12] 1 1 1 1 ms Clock t CYC Clock Cycle T...
Page 11 - Switching Waveforms; Read Cycle Timing
CY7C1339G Document #: 38-05520 Rev. *F Page 11 of 18 Switching Waveforms Read Cycle Timing [18] Note: 18. On this diagram, when CE is LOW, CE 1 is LOW, CE 2 is HIGH and CE 3 is LOW. When CE is HIGH, CE 1 is HIGH or CE 2 is LOW or CE 3 is HIGH. tCYC t CL CLK ADSP t ADH t ADS ADDRESS t CH OE ADSC CE t...
Page 12 - Write Cycle Timing
CY7C1339G Document #: 38-05520 Rev. *F Page 12 of 18 Write Cycle Timing [18, 19] Note: 19. Full width write can be initiated by either GW LOW; or by GW HIGH, BWE LOW and BW [A:D] LOW. Switching Waveforms (continued) t CYC tCL CLK ADSP tADH tADS ADDRESS tCH OE ADSC CE tAH tAS A1 tCEH tCES BWE, BW[A :...
Page 13 - Read/Write Cycle Timing
CY7C1339G Document #: 38-05520 Rev. *F Page 13 of 18 Read/Write Cycle Timing [18, 20, 21] Notes: 20. The data bus (Q) remains in high-Z following a WRITE cycle, unless a new read access is initiated by ADSP or ADSC.21. GW is HIGH. Switching Waveforms (continued) tCYC tCL CLK ADSP tADH tADS ADDRESS t...
Page 14 - ZZ Mode Timing
CY7C1339G Document #: 38-05520 Rev. *F Page 14 of 18 ZZ Mode Timing [22, 23] Notes: 22. Device must be deselected when entering ZZ mode. See Cycle Descriptions table for all possible signal conditions to deselect the device.23. DQs are in high-Z when exiting ZZ sleep mode. Switching Waveforms (conti...
Page 15 - Ordering Information
CY7C1339G Document #: 38-05520 Rev. *F Page 15 of 18 Ordering Information Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or visit www.cypress.com for actual products offered. Speed (MHz) Ordering Code Package Diagram Package Type Op...
Page 16 - Package Diagrams
CY7C1339G Document #: 38-05520 Rev. *F Page 16 of 18 Package Diagrams NOTE: 1. JEDEC STD REF MS-026 2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.0098 in (0.25 mm) PER SIDE 3. DIMENSIONS IN MILLIMETERS BODY LENGTH DIMENSIONS ARE MAX ...
Page 18 - Document History Page; Change
CY7C1339G Document #: 38-05520 Rev. *F Page 18 of 18 Document History Page Document Title: CY7C1339G 4-Mbit (128K x 32) Pipelined Sync SRAMDocument Number: 38-05520 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 224368 See ECN RKF New data sheet *A 288909 See ECN VBL In Ordering In...