Cypress CY14B101L - Manuals

Cypress CY14B101L – Manual in PDF format online.

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Summary

Page 2 - SS

CY14B101L Document Number: 001-06400 Rev. *I Page 2 of 18 Pinouts Figure 1. Pin Diagram - 32-Pin SOIC and 48-Pin SSOP Pin Definitions Pin Name Alt IO Type Description A 0 –A 16 Input Address Inputs. Used to select one of the 131,072 bytes of the nvSRAM. DQ 0 -DQ 7 Input or Output Bidirectional Data ...

Page 3 - Figure 2; Figure 2. AutoStore Mode

CY14B101L Document Number: 001-06400 Rev. *I Page 3 of 18 Device Operation The CY14B101L nvSRAM is made up of two functional compo-nents paired in the same physical cell. These are an SRAMmemory cell and a nonvolatile QuantumTrap cell. The SRAMmemory cell operates as a standard fast static RAM. Data...

Page 4 - Figure 3; Figure 3. Current Versus Cycle Time

CY14B101L Document Number: 001-06400 Rev. *I Page 4 of 18 Hardware RECALL (Power Up) During power up or after any low power condition (V CC < V SWITCH ), an internal RECALL request is latched. When V CC once again exceeds the sense voltage of V SWITCH , a RECALL cycle is automatically initiated a...

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