Analog Devices ADSP-21020 - Manual
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Table of Contents:
- Page 5 – Figure 2. Basic System Configuration; PIN DESCRIPTIONS; Type
- Page 6 – INSTRUCTION SET SUMMARY
- Page 8 – Table II. Condition and Termination Codes; Name; IMMEDIATE MOVE INSTRUCTIONS; Notation
- Page 9 – Table III. Universal Registers; Table IV. ALU Compute Operations
- Page 10 – Shifter
- Page 11 – Function
- Page 12 – ABSOLUTE MAXIMUM RATINGS*
- Page 13 – RESET Width Low; assuming stable V
- Page 14 – Interrupts; IRQ; IRQ; IRQ; Timer
- Page 16 – PMRD
- Page 17 – xTS; Figure 9. External Memory Three-State Control
- Page 18 – ns
- Page 19 – Figure 10. Memory Read
- Page 21 – Figure 11. Memory Write
- Page 22 – TRST
- Page 24 – Output Enable Time
- Page 25 – Capacitive Loading
- Page 26 – ENVIRONMENTAL CONDITIONS; PD; for Various Airflow Values; CPGA with No Heat Sink 12.8; NOTES; is approximately 1; Power Dissipation; Pin; PMS; Power and Ground Guidelines
- Page 27 – Target System Requirements For Use Of EZ-ICE Emulator
- Page 28 – TOP VIEW
- Page 29 – BOTTOM VIEW
- Page 32 – ORDERING GUIDE; Ambient Temperature
FUNCTIONAL BLOCK DIAGRAM
EXTERNAL
ADDRESS
BUSES
PROGRAM
SEQUENCER
EXTERNAL
DATA
BUSES
DATA ADDRESS
GENERATORS
DAG 1
DAG 2
PROGRAM MEMORY ADDRESS
PROGRAM MEMORY DATA
DATA MEMORY DATA
DATA MEMORY ADDRESS
INSTRUCTION
CACHE
ARITHMETIC UNITS
SHIFTER
MULTIPLIER
ALU
REGISTER FILE
TIMER
JTAG TEST
& EMULATION
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
32/40-Bit IEEE Floating-Point
DSP Microprocessor
ADSP-21020
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
GENERAL DESCRIPTION
The ADSP-21020 is the first member of Analog Devices’ family
of single-chip IEEE floating-point processors optimized for
digital signal processing applications. Its architecture is similar
to that of Analog Devices’ ADSP-2100 family of fixed-point
DSP processors.
Fabricated in a high-speed, low-power CMOS process, the
ADSP-21020 has a 30 ns instruction cycle time. With a high-
performance on-chip instruction cache, the ADSP-21020 can
execute every instruction in a single cycle.
The ADSP-21020 features:
•
Independent Parallel Computation Units
The arithmetic/logic unit (ALU), multiplier and shifter
perform single-cycle instructions. The units are architecturally
arranged in parallel, maximizing computational throughput. A
single multifunction instruction executes parallel ALU and
FEATURES
Superscalar IEEE Floating-Point Processor
Off-Chip Harvard Architecture Maximizes Signal
Processing Performance
30 ns, 33.3 MIPS Instruction Rate, Single-Cycle
Execution
100 MFLOPS Peak, 66 MFLOPS Sustained Performance
1024-Point Complex FFT Benchmark: 0.58 ms
Divide (y/x): 180 ns
Inverse Square Root (1/
√
x
): 270 ns
32-Bit Single-Precision and 40-Bit Extended-Precision
IEEE Floating-Point Data Formats
32-Bit Fixed-Point Formats, Integer and Fractional,
with 80-Bit Accumulators
IEEE Exception Handling with Interrupt on Exception
Three Independent Computation Units: Multiplier,
ALU, and Barrel Shifter
Dual Data Address Generators with Indirect, Immedi-
ate, Modulo, and Bit Reverse Addressing Modes
Two Off-Chip Memory Transfers in Parallel with
Instruction Fetch and Single-Cycle Multiply & ALU
Operations
Multiply with Add & Subtract for FFT Butterfly
Computation
Efficient Program Sequencing with Zero-Overhead
Looping: Single-Cycle Loop Setup
Single-Cycle Register File Context Switch
15 (or 25) ns External RAM Access Time for Zero-Wait-
State, 30 (or 40) ns Instruction Execution
IEEE JTAG Standard 1149.1 Test Access Port and
On-Chip Emulation Circuitry
223-Pin PGA Package (Ceramic)
multiplier operations. These computation units support IEEE
32-bit single-precision floating-point, extended precision
40-bit floating-point, and 32-bit fixed-point data formats.
•
Data Register File
A general-purpose data register file is used for transferring
data between the computation units and the data buses, and
for storing intermediate results. This 10-port (16-register)
register file, combined with the ADSP-21020’s Harvard
architecture, allows unconstrained data flow between
computation units and off-chip memory.
•
Single-Cycle Fetch of Instruction and Two Operands
The ADSP-21020 uses a modified Harvard architecture in
which data memory stores data and program memory stores
both instructions and data. Because of its separate program
and data memory buses and on-chip instruction cache, the
processor can simultaneously fetch an operand from data
memory, an operand from program memory, and an
instruction from the cache, all in a single cycle.
•
Memory Interface
Addressing of external memory devices by the ADSP-21020 is
facilitated by on-chip decoding of high-order address lines to
generate memory bank select signals. Separate control lines
are also generated for simplified addressing of page-mode
DRAM.
The ADSP-21020 provides programmable memory wait
states, and external memory acknowledge controls allow
interfacing to peripheral devices with variable access times.
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Summary
ADSP-21020 REV. C – 5 – 4 1 × CLOCK CLKIN PMA PMD DMACK DMA DMD ADSP-21010 24 48 32 32 2 PMACK 4 DMPAGE PMPAGE FLAG3-0 JTAG 5 4 RCOMP TIMEXP ADDR DATA PROGRAM MEMORY SELECTS OE WE PMS1-0 PMRD PMWR DMRD DMWR DMTS DATA MEMORY ACK PERIPHERALS ADDR DATA ADDR DATA SELECTS SELECTS OE WE OE WE BR BG RESET ...
ADSP-21020 REV. C – 6 – PinName Type Function DMPAGE O Data Memory Page Boundary. The ADSP-21020 asserts this pin to signal that a datamemory page boundary has been crossed.Memory pages must be defined in thememory control registers. DMTS I/S Data Memory Three-State Control. DMTS places the data mem...
ADSP-21020 REV. C – 8 – Table II. Condition and Termination Codes Name Description eq ALU equal to zero ne ALU not equal to zero ge ALU greater than or equal to zero lt ALU less than zero le ALU less than or equal to zero gt ALU greater than zero ac ALU carry not ac Not ALU carry av ALU overflow not...
