Page 2 - TABLE OF CONTENTS; REVISION HISTORY
HSC-ADC-EVALC Rev. 0 | Page 2 of 32 TABLE OF CONTENTS Features .............................................................................................. 1 Equipment Needed ........................................................................... 1 Product Highlights .............................
Page 3 - See Figure 5 to Figure 20 for complete schematics and layout plots.
HSC-ADC-EVALC Rev. 0 | Page 3 of 32 PRODUCT DESCRIPTION The Analog Devices, Inc. high speed converter evaluation platform (HSC-ADC-EVALC) includes the latest version of VisualAnalog and an FPGA-based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-d...
Page 4 - EVALUATION BOARD HARDWARE; EASY; Requirements; Important Note; VisualAnalog User Manual; POWER SUPPLIES
HSC-ADC-EVALC Rev. 0 | Page 4 of 32 EVALUATION BOARD HARDWARE HSC-ADC-EVALC ADC CAPTURE BOARD EASY START Requirements • HSC-ADC-EVALC ADC capture board, VisualAnalog, 5 V wall transformer, and USB cable • High speed ADC evaluation board and ADC data sheet • Power supply for ADC evaluation board • An...
Page 5 - JUMPERS; Default Settings; Table 1. Jumper Configurations
HSC-ADC-EVALC Rev. 0 | Page 5 of 32 ROHDE & SCHWARZ, SMHU, 2V p-p SIGNAL SYNTHESIZER ROHDE & SCHWARZ, SMHU, 2V p-p SIGNAL SYNTHESIZER BAND- PASS FILTER USB CONNECTION 06 67 6- 004 HSC-ADC-EVALC DATA CAPTURE BOARD PC RUNNING VisualAnalog – + PS GN D V RE G 5V DC 3A MAX WALL OUTLET100V TO 240V...
Page 6 - HSC-ADC-EVALC ADC CAPTURE BOARD FEATURES
HSC-ADC-EVALC Rev. 0 | Page 6 of 32 HSC-ADC-EVALC ADC CAPTURE BOARD FEATURES 06 67 6- 00 2 GENERAL PURPOSE I/O, USB/SPI CONTROL DATA BUS 1 DATA BUS 2 FPGA LOADSELECT ON BOARDPOWER SUPPLY 100MHzOSCILLATOR FPGA I/OVOLTAGE MODE FPGA CONFIGPROM XILINX VIRTEX-4 FPGA DEBUG PINS EXTERNAL SYNC I/O CYPRESS U...
Page 7 - HSC-ADC-EVALC SUPPORTED ADC EVALUATION BOARDS; Refer to the Analog Devices ADC capture board product page at
HSC-ADC-EVALC Rev. 0 | Page 7 of 32 06 67 6- 0 03 Figure 4. HSC-ADC-EVALC Components (Bottom View) HSC-ADC-EVALC SUPPORTED ADC EVALUATION BOARDS Refer to the Analog Devices ADC capture board product page at www.analog.com/FIFO for a list of HSC-ADC-EVALC-compatible ADC evaluation boards. Some legacy...
Page 8 - THEORY OF OPERATION; CONFIGURATION; ) signals to the converter board via connector; INPUT CIRCUITRY
HSC-ADC-EVALC Rev. 0 | Page 8 of 32 THEORY OF OPERATION The HSC-ADC-EVALC evaluation platform is based around the Virtex-4 FPGA (XC4VFX20-10FFG672C) from Xilinx®, which can be programmed through VisualAnalog to operate with a variety of data converters. Another key component, the Cypress USB device ...
Page 9 - EVALUATION BOARD SCHEMATICS AND ARTWORK; TYCO AND DSP EZ–KIT CONNECTOR TO FPGA
HSC-ADC-EVALC Rev. 0 | Page 9 of 32 EVALUATION BOARD SCHEMATICS AND ARTWORK HSC-ADC-EVALC SCHEMATICS 066 76 -0 05 TYCO AND DSP EZ–KIT CONNECTOR TO FPGA XC4VFX20-10FFG672C XC4VFX20-10FFG672C XC4VFX20-10FFG672C XC4VFX20-10FFG672C R38 100 Ω R39 100 Ω R5051.1 Ω Figure 5.
Page 11 - FPGA TO SRAM DATA
HSC-ADC-EVALC Rev. 0 | Page 11 of 32 FPGA TO SRAM DATA XC4VFX20-10FFG672C 06 67 6- 00 7 XC4VFX20-10FFG672C Figure 7.
Page 13 - SRAM AND FPGA POWER
HSC-ADC-EVALC Rev. 0 | Page 13 of 32 SRAM AND FPGA POWER 06 67 6- 00 9 XC4VFX20-10FFG672C XC4VFX20-10FFG672C R66499 Ω R64499 Ω R65499 Ω R63499 Ω Figure 9.
Page 16 - ROCKET I/0 CONNECTIONS
HSC-ADC-EVALC Rev. 0 | Page 16 of 32 066 76 -0 12 ROCKET I/0 CONNECTIONS Figure 12.
Page 17 - USB CONNECTIONS
HSC-ADC-EVALC Rev. 0 | Page 17 of 32 06 67 6- 0 13 USB CONNECTIONS R49 3.74 Ω R71 3.74 Ω R48 100K Ω SDI & SDO DIRECTIONS ARE WITHRESPECT TO THE DEVICE UNDERCONTROL. US B Di re ct I /O (3 .3 V ) Figure 13.
Page 19 - EZ–KIT EXPANSION INTERFACE – FOR DSPs
HSC-ADC-EVALC Rev. 0 | Page 19 of 32 06 67 6- 01 5 EZ–KIT EXPANSION INTERFACE – FOR DSPs P1 P2 P3 Figure 15.
Page 23 - PCB LAYOUT
HSC-ADC-EVALC Rev. 0 | Page 23 of 32 PCB LAYOUT 06 67 6- 0 19 GENERAL PURPOSE I/O, USB/SPI CONTROL DATA BUS 1 DATA BUS 2 XILINX VIRTEX-4 FPGA DEBUG PINS EXTERNAL SYNC I/O CYPRESS USB CONTROLLER USB CONNECTOR FPGA JTAG CONNECTOR 5VDC POWER INPUT FPGA LOADSELECT ON BOARDPOWER SUPPLY 100MHzOSCILLATOR F...
Page 28 - ORDERING INFORMATION; Qty Reference
HSC-ADC-EVALC Rev. 0 | Page 28 of 32 ORDERING INFORMATION BILL OF MATERIALS (RoHS COMPLIANT) Table 6. Qty Reference Designator Description Manufacturer Part Number 1 PCB PCB, ADC evaluation platform MOOG/PCSM GS09156x8 0 BGA1, BGA2 IC, 18-bit DDRII SRAM 2-word burst operation (MOS integrated circuit...
Page 31 - NOTES