Cypress Z9973 - Manuals

Cypress Z9973 – Manual in PDF format online.

Manuals:

Manual Cypress Z9973

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Summary

Page 2 - Pin Description

Z9973 Document #: 38-07089 Rev. *D Page 2 of 9 Pin Description [2] Pin Number Pin Name PWR I/O Type Pin Description 11 PECL_CLK I PU PECL Clock Input. 12 PECL_CLK# I PD PECL Clock Input. 9 TCLK0 I PU External Reference/Test Clock Input. 10 TCLK1 I PU External Reference/Test Clock Input. 44, 46, 48, ...

Page 3 - contain short or “runt” clock periods. These are clock cycles; SYNC Output; Table 2. Frequency Select Inputs

Z9973 Document #: 38-07089 Rev. *D Page 3 of 9 Functional Description The Z9973 has an integrated PLL that provides low-skew andlow-jitter clock outputs for high-performance microprocessors.Three independent banks of four outputs as well as anindependent PLL feedback output, FB_OUT, provide excep-ti...

Page 4 - Figure 1. Sync Output Waveforms

Z9973 Document #: 38-07089 Rev. *D Page 4 of 9 SYNC QC QA SYNC QC QA SYNC QA QC SYNC QC QA SYNC QA QC SYNC QC QA SYNC QC QA VCO 1:1 Mode 2:1 Mode 3:1 Mode 3:2 Mode 4:1 Mode 4:3 Mode 6:1 Mode Figure 1. Sync Output Waveforms [+] Feedback

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