Cypress CYV15G0404RB - Manuals

Cypress CYV15G0404RB – Manual in PDF format online.

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Manual

Manual Cypress CYV15G0404RB

Summary

Page 2 - Figure 1. HOTLink IITM System Connections; CYV15G0404RB Deserializing Reclocker Logic Block Diagram; Deserializer

CYV15G0404RB Document #: 38-02102 Rev. *C Page 2 of 27 Figure 1. HOTLink II™ System Connections V ideo C o p ro c ess o r 10 10 10 10 V ideo C opro c essor 10 10 10 10 Serial Links Independent CYV15G0403TB Independent Reclocking Deserializer Serializer Channel CYV15G0404RB Channel Reclocked Outputs ...

Page 3 - Reclocking Deserializer Path Block Diagram; JTAG

CYV15G0404RB Document #: 38-02102 Rev. *C Page 3 of 27 Reclocking Deserializer Path Block Diagram INA1+INA1– INA2+INA2– INSELA Clock & Data Recovery PLL Shif ter LFIA 10 RXDA[9:0] Receive Signal Monitor Out p ut Reg ister RXCLKA+RXCLKA– ÷ 2 RXPLLPDA SPDSELA ULCA RXRATEA 10 BIST LFSR 10 RXBISTA[1...

Page 5 - Device Configuration and Control Block Diagram; Device Configuration

CYV15G0404RB Document #: 38-02102 Rev. *C Page 5 of 27 WREN ADDR[3:0] DATA[7:0] Device Configuration and Control Block Diagram = Internal Signal RXRATE[A..D] RXBIST[A..D] SDASEL[A..D][1:0]RXPLLPD[A..D] ROE[2..1][A..D] GLEN[11..0]FGLEN[2..0] Device Configuration and Control Interface [+] Feedback

Page 9 - Pin Definitions

CYV15G0404RB Document #: 38-02102 Rev. *C Page 9 of 27 LDTDEN LVTTL Input, internal pull up Level Detect Transition Density Enable . When LDTDEN is HIGH, the Signal Level Detector, Range Controller, and Transition Density Detector are all enabledto determine if the RXPLL tracks TRGCLKx± or the selec...

Page 11 - Analog Amplitude

CYV15G0404RB Document #: 38-02102 Rev. *C Page 11 of 27 CYV15G0404RB HOTLink II Operation The CYV15G0404RB is a highly configurable, independentclocking, quad-channel reclocking deserializer that supportsreliable transfer of large quantities of digital video data, usinghigh-speed serial links from m...

Page 13 - BIST Status State Machine; Power Control; Device Reset State; Global Enable Function

CYV15G0404RB Document #: 38-02102 Rev. *C Page 13 of 27 reclocker serial drivers for a channel are in this disabled state,the associated internal reclocker logic also powers down. Thedeserialization logic and parallel outputs remain enabled. Adevice reset (RESET sampled LOW) disables all outputdrive...

Page 15 - “JTAG Support” on page 17

CYV15G0404RB Document #: 38-02102 Rev. *C Page 15 of 27 Device Configuration Strategy Follow these steps to load the configuration latches on eachchannel: 1. Pulse RESET Low after device power up. This operation resets all four channels. Initialize the JTAG state machine to its reset state, as detai...

Page 16 - Table 4. Device Control Latch Configuration Table

CYV15G0404RB Document #: 38-02102 Rev. *C Page 16 of 27 Table 4. Device Control Latch Configuration Table ADDR Channel Type DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 Reset Value 0 (0000b) A S 1 0 X X 0 0 RXRATEA GLEN0 10111111 1 (0001b) A S SDASEL2A[1] SDASEL2A[0] SDASEL1A[1] SDASEL1A[0] X X T...

Page 17 - JTAG Support; The order of device reset (using RESET) and JTAG

CYV15G0404RB Document #: 38-02102 Rev. *C Page 17 of 27 JTAG Support The CYV15G0404RB contains a JTAG port to allow systemlevel diagnosis of device interconnect. Of the available JTAGmodes, boundary scan and bypass are supported. Thiscapability is present only on the LVTTL inputs and outputs andthe ...

Page 18 - Figure 2. Receive BIST State Machine

CYV15G0404RB Document #: 38-02102 Rev. *C Page 18 of 27 Figure 2. Receive BIST State Machine Receive BIST Detected LOW Monitor Data Received {BISTSTx, RXDx[0], No RX PLL Out of Lock Yes, {BISTSTx, RXDx[0], RXDx[1]} = BIST_DATA_COMPARE (000, 001) Compare Next Character Auto-Abort Condition Mismatch E...

Page 19 - CYV15G0404RB DC Electrical Characteristics

CYV15G0404RB Document #: 38-02102 Rev. *C Page 19 of 27 Maximum Ratings Excedding maximum ratings may shorten the device life. Userguidelines are not tested Storage Temperature .................................. –65°C to +150°C Ambient Temperature withPower Applied .....................................

Page 20 - AC Test Loads and Waveforms; GND

CYV15G0404RB Document #: 38-02102 Rev. *C Page 20 of 27 Differential CML Serial Outputs: ROUTA1 ± , ROUTA2 ± , ROUTB1 ± , ROUTB2 ±, ROUTC1 ± , ROUTC2 ± , ROUTD1 ± , ROUTD2 ± V OHC Output HIGH Voltage (V CC Referenced) 100 Ω differential load V CC – 0.5 V CC – 0.2 V 150 Ω differential load V CC – 0.5...

Page 21 - CYV15G0404RB AC Electrical Characteristics

CYV15G0404RB Document #: 38-02102 Rev. *C Page 21 of 27 Notes 14. Tested initially and after any design or process changes that may affect these parameters, but not 100% tested.15. The ratio of rise time to falling time must not vary by greater than 2:1.16. For a given operating frequency, neither r...

Page 22 - Capacitance

CYV15G0404RB Document #: 38-02102 Rev. *C Page 22 of 27 CYV15G0404RB Device RESET Characteristics Over the Operating Range t RST Device RESET Pulse Width 30 ns CYV15G0404RB Reclocker Serial Output Characteristics Over the Operating Range Parameter Description Condition Min. Max. Unit t B Bit Time 51...

Page 23 - RXCLKx–

CYV15G0404RB Document #: 38-02102 Rev. *C Page 23 of 27 Switching Waveforms for the CYV15G0404RB HOTLink II Receiver CYV15G0404RB HOTLink II Bus Configuration Switching Waveforms RXCLKx+ RXDx[9:0] t RXDV+ t RXCLKP Receive InterfaceRead Timing RXRATEx = 0 RXCLKx– t RXDV– RXCLKx+ t RXDV+ t RXDV– t RXC...

Page 26 - SIDE VIEW

CYV15G0404RB Document #: 38-02102 Rev. *C Page 26 of 27 © Cypress Semiconductor Corporation, 2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the useof any circuitry other than circuitry embodied in a Cypress ...

Page 27 - Document History Page; ISSUE

CYV15G0404RB Document #: 38-02102 Rev. *C Page 27 of 27 Document History Page Document Title: CYV15G0404RB Independent Clock Quad HOTLink II™ Deserializing ReclockerDocument Number: 38-02102 REV. ECN NO. ISSUE DATE ORIG. OF CHANGE DESCRIPTION OF CHANGE ** 246850 See ECN FRE New Data Sheet *A 338721 ...