Cypress CYV15G0101EQ - Manuals

Page 2 - Pinouts; CYV15G0101EQ Multi-Rate Video Cable Equalizer Block Diagram; Equalizer Block Diagram

CYV15G0101EQ Document Number: 001-04184 Rev. *E Page 2 of 10 Pinouts Figure 1. Pin Diagram - 16 Pin SOIC (Top View) CYV15G0101EQ Multi-Rate Video Cable Equalizer Block Diagram CYV15G0101EQ Multi-Rate Video Cable Equalizer Block Diagram Differential Output Cable Length Analog Adjustor and Mute Thresh...

Page 4 - Figure 3; MCLADJ; Figure 2; BYPASS

CYV15G0101EQ Document Number: 001-04184 Rev. *E Page 4 of 10 Equalizer Operation The CYV15G0101EQ is a high speed adaptive cable equalizerdesigned to equalize standard definition (SD) and high definition(HD) serial digital interface (SDI) video data streams.CYV15G0101EQ equalizer is optimized to equ...

Page 5 - Maximum Ratings; Power Up Requirements; Operating Range; DC Electrical Characteristics

CYV15G0101EQ Document Number: 001-04184 Rev. *E Page 5 of 10 Maximum Ratings Exceeding maximum ratings may shorten the useful life of thedevice. These user guidelines are not tested. Storage Temperature .................................. –65°C to +150°C Ambient Temperature withPower Applied ...........

Page 6 - AC Electrical Characteristics

CYV15G0101EQ Document Number: 001-04184 Rev. *E Page 6 of 10 AC Electrical Characteristics Parameter Description Test Conditions Min Typ Max Unit – Serial Input Data Rate [1] – 143 – 1485 Mbps V SDI Input Voltage Swing Single-ended, at the transmitter, HD data rate 500 [5] 1200 mV V SDI Input Voltag...

Page 7 - Typical Performance Graphs

CYV15G0101EQ Document Number: 001-04184 Rev. *E Page 7 of 10 Typical Performance Graphs (Unless otherwise stated, V CC = 3.3V, T A = 25°C) Figure 2. MCLADJ Input Voltage vs. Belden 1694A Cable Length at SD-SDI and HD-SDI Data Rates Figure 3. CLI Output Voltage vs. Belden 1694A Cable Length at SD-SDI...

Page 8 - Typical Application Circuit; Figure 4. Interfacing CYV15G0101EQ to the HOTLink II SerDes

CYV15G0101EQ Document Number: 001-04184 Rev. *E Page 8 of 10 Typical Application Circuit Figure 4. Interfacing CYV15G0101EQ to the HOTLink II SerDes C L I 1 V C C 2 V E E 3 S D I 4 S D I 5 V E E 6 A G C + 7 A G C − 8 B Y P A S S 9 M C L A D J 10 V E E 11 S D O 12 S D O 13 V E E 14 V C C 15 16 CYV1 5...

Page 9 - Ordering Information; Ordering Code; Package Dimension

CYV15G0101EQ Document Number: 001-04184 Rev. *E Page 9 of 10 Ordering Information Ordering Code Package Name Package Type Operating Range CYV15G0101EQ-SXC SZ16.15 Pb-free 16-Pin 150 Mil SOIC 0 to 70°C Package Dimension Figure 5. 16-Pin (150 Mil) SOIC S16.15 0).)$ ²^² 3%!4).'0,!.% ;=;= ;= ;= ;=;= ;=&...

Page 10 - Document History Page; ISSUE

Document Number: 001-04184 Rev. *E Revised October 25, 2007 Page 10 of 10 PSoC Designer™, Programmable System-on-Chip™, and PSoC Express™ are trademarks and PSoC® is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registeredtrademarks referenced herein are property of t...