Cypress CY8C24123 - Manuals

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Manual Cypress CY8C24123

Summary

Page 2 - Logic Block Diagram; PSoC Core; Figure 1. Digital System Block Diagram; PSoC Device Characteristics; Digital PSoC Block Array

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 2 of 43 PSoC ® Functional Overview The PSoC ® family consists of many Mixed Signal Array with On-Chip Controller devices. These devices are designed toreplace multiple traditional MCU-based system components withone, low cost sing...

Page 3 - Analog System; Figure 2. Analog System Block Diagram; Block Array; Analog Reference

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 3 of 43 Analog System The Analog System is composed of six configurable blocks, eachcomprised of an opamp circuit allowing the creation of complexanalog signal flows. Analog peripherals are very flexible and canbe customized to su...

Page 4 - Getting Started; , click the Online Store shopping cart; Table 1. PSoC Device Characteristics

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 4 of 43 Additional System Resources System Resources, some of which have been previously listed,provide additional capability useful to complete systems.Additional resources include a multiplier, decimator, switch modepump, low vo...

Page 5 - Development Tools; The Cypress MicroSystems PSoC Designer is a Microsoft; Figure 3. PSoC Designer Subsystems; PSoC Designer Software Subsystems; Device Editor; Designer

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 5 of 43 Development Tools The Cypress MicroSystems PSoC Designer is a Microsoft ® Windows-based, integrated development environment for theProgrammable System-on-Chip (PSoC) devices. The PSoCDesigner IDE and application runs on Wi...

Page 6 - Hardware Tools; Figure 4. PSoC Development Tool Kit

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 6 of 43 Debugger The PSoC Designer Debugger subsystem provides hardwarein-circuit emulation, allowing the designer to test the program ina physical system while providing an internal view of the PSoCdevice. Debugger commands allow...

Page 7 - Figure 5. User Module and Source Code Development Flows; Document Conventions; Table 7; Acronym

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 7 of 43 Figure 5. User Module and Source Code Development Flows The next step is to write your main program, and anysub-routines using PSoC Designer’s Application Editorsubsystem. The Application Editor includes a Project Managert...

Page 8 - Pinouts; PDIP

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 8 of 43 Pinouts The CY8C24x23 PSoC device is available in a variety of packages which are listed and illustrated in the following tables. Every portpin (labeled with a “P”) is capable of Digital IO. However, Vss, Vdd, SMP, and XRE...

Page 10 - MLF

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 10 of 43 32-Pin Part Pinout Table 6. 32-Pin Part Pinout (MLF*) Pin No. Type Pin Name Description Figure 9. CY8C24423 32-Pin PSoC Device Digital Analog 1 IO P2[7] 2 IO P2[5] 3 IO I P2[3] Direct switched capacitor block input 4 IO I...

Page 11 - Register Reference; PSoC Programmable; Register Conventions; Abbreviations Used; Register Mapping Tables; Note; In the following register mapping tables, blank fields are; Table 7. Abbreviations; RW

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 11 of 43 Register Reference This section lists the registers of the CY8C27xxx PSoC deviceby way of mapping tables, in offset order. For detailed registerinformation, reference the PSoC Programmable System-on-Chip Technical Referen...

Page 12 - Table 8. Register Map Bank 0 Table: User Space

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 12 of 43 Table 8. Register Map Bank 0 Table: User Space Nam e Add r (0, H ex) Acces s Nam e Add r (0, H ex) Acces s Nam e Add r (0, H ex) Acces s Nam e Add r (0, H ex) Acce ss PRT0DR 00 RW 40 ASC10CR0 80 RW C0 PRT0IE 01 RW 41 ASC1...

Page 13 - Table 9. Register Map Bank 1 Table: Configuration Space

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 13 of 43 DCB03DR2 2E RW 6E AE ACC_DR3 EE RW DCB03CR0 2F # 6F AF ACC_DR2 EF RW 30 ACB00CR3 70 RW RDI0RI B0 RW F0 31 ACB00CR0 71 RW RDI0SYN B1 RW F1 32 ACB00CR1 72 RW RDI0IS B2 RW F2 33 ACB00CR2 73 RW RDI0LT0 B3 RW F3 34 ACB01CR3 74...

Page 15 - Electrical Specifications; CPU Frequency

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 15 of 43 Electrical Specifications This section presents the DC and AC electrical specifications of the CY8C24x23 PSoC device. For latest electrical specifications, http://www.cypress.com . Specifications are valid for -40 o C ≤ T...

Page 16 - Thermal Impedances per Package

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 16 of 43 Absolute Maximum Ratings Exceeding maximum ratings may shorten the useful life of the device. User guidelines are not tested. Operating Temperature Table 11. Absolute Maximum Ratings Symbol Description Min Typ Max Units N...

Page 17 - DC Electrical Characteristics; DC Chip-Level Specifications

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 17 of 43 DC Electrical Characteristics DC Chip-Level Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25Vand -40 ° C ≤ T A ≤ 85 ° C, or 3.0V ...

Page 19 - dB; PSRR; Supply Voltage Rejection Ratio

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 19 of 43 G OLOA Open Loop GainPower = LowPower = MediumPower = High 606080 – – dB Specification is appli-cable at high power. For all other bias modes (except high power, high opamp bias), minimum is 60 dB. V OHIGHOA High Output V...

Page 21 - DC Analog Output Buffer Specifications

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 21 of 43 DC Analog Output Buffer Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25Vand -40 ° C ≤ T A ≤ 85 ° C, or 3.0V to 3.6V and -40 ° C ...

Page 22 - DC Switch Mode Pump Specifications

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 22 of 43 DC Switch Mode Pump Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25Vand -40 ° C ≤ T A ≤ 85 ° C, or 3.0V to 3.6V and -40 ° C ≤ T ...

Page 23 - DC Analog Reference Specifications

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 23 of 43 DC Analog Reference Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25Vand -40 ° C ≤ T A ≤ 85 ° C, or 3.0V to 3.6V and -40 ° C ≤ T ...

Page 26 - DC Programming Specifications

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 26 of 43 DC Programming Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25Vand -40 ° C ≤ T A ≤ 85 ° C, or 3.0V to 3.6V and -40 ° C ≤ T A ≤ 8...

Page 27 - AC Electrical Characteristics; AC Chip-Level Specifications

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 27 of 43 AC Electrical Characteristics AC Chip-Level Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25Vand -40 ° C ≤ T A ≤ 85 ° C, or 3.0V ...

Page 28 - PLL; PLL; PLL; PLL

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 28 of 43 Figure 12. PLL Lock Timing Diagram Figure 13. PLL Lock for Low Gain Setting Timing Diagram Figure 14. External Crystal Oscillator Startup Timing Diagram Figure 15. 24 MHz Period Jitter (IMO) Timing Diagram Figure 16. 32 k...

Page 29 - AC General Purpose IO Specifications; GPIO

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 29 of 43 AC General Purpose IO Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25Vand -40 ° C ≤ T A ≤ 85 ° C, or 3.0V to 3.6V and -40 ° C ≤ ...

Page 30 - AC Operational Amplifier Specifications

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 30 of 43 AC Operational Amplifier Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25Vand -40 ° C ≤ T A ≤ 85 ° C, or 3.0V to 3.6V and -40 ° C...

Page 32 - AC Digital Block Specifications

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 32 of 43 AC Digital Block Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25Vand -40 ° C ≤ T A ≤ 85 ° C, or 3.0V to 3.6V and -40 ° C ≤ T A ≤...

Page 33 - AC Analog Output Buffer Specifications

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 33 of 43 AC Analog Output Buffer Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25Vand -40 ° C ≤ T A ≤ 85 ° C, or 3.0V to 3.6V and -40 ° C ...

Page 35 - SDA

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 35 of 43 AC I 2 C Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25Vand -40 ° C ≤ T A ≤ 85 ° C, or 3.0V to 3.6V and -40 ° C ≤ T A ≤ 85 ° C,...

Page 36 - Packaging Information

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 36 of 43 Packaging Information This section presents the packaging specifications for the CY8C24x23 PSoC device, along with the thermal impedances for eachpackage and the typical package capacitance on crystal pins. Figure 19. 8-P...

Page 42 - Ordering Information; Ordering Code Definitions

CY8C24123 CY8C24223, CY8C24423 Document Number: 38-12011 Rev. *G Page 42 of 43 Ordering Information The following table lists the CY8C24x23 PSoC Device family’s key package features and ordering codes. Note For Die sales information, contact a local Cypress sales office or Field Applications Enginee...

Page 43 - Document History Page; Worldwide Sales and Design Support

Document Number: 38-12011 Rev. *G Revised December 11, 2008 Page 43 of 43 PSoC Designer™, Programmable System-on-Chip™, and PSoC Express™ are trademarks and PSoC® is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registeredtrademarks referenced herein are property of t...