Cypress CY8C20x46 - Manuals

Cypress CY8C20x46 – Manual in PDF format online.

Manuals:

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Summary

Page 2 - Block Diagram; CAPSENSE; Multiple Clock Sources; PSoC CORE

CY8C20x36/46/66, CY8C20396 Document Number: 001-12696 Rev. *D Page 2 of 34 Block Diagram CAPSENSE SYSTEM 1K/2K SRAM Interrupt Controller Sleep and Watchdog Multiple Clock Sources Internal Low Speed Oscillator (ILO) 6/12/24 MHz Internal Main Oscillator (IMO) PSoC CORE CPU Core (M8C) Supervisory ROM (...

Page 3 - The architecture for this device family, as shown in the; PSoC Core; Figure 1. Analog System Block Diagram; Analog Multiplexer System

CY8C20x36/46/66, CY8C20396 Document Number: 001-12696 Rev. *D Page 3 of 34 PSoC ® Functional Overview The PSoC family consists of on-chip Controller devices. Thesedevices are designed to replace multiple traditional MCU-basedcomponents with one, low cost single-chip programmablecomponent. A PSoC dev...

Page 4 - Getting Started

CY8C20x36/46/66, CY8C20396 Document Number: 001-12696 Rev. *D Page 4 of 34 Additional System Resources System Resources, some of which are listed in the previoussections, provide additional capability useful to completesystems. Additional resources include low voltage detection andpower on reset. Th...

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