Cypress CY7C142 - Manuals - manualsarea.com

Page 2 - Specification

CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Document #: 38-06031 Rev. *E Page 2 of 15 Pinouts Figure 1. 52-Pin PLCC (Top View) Figure 2. 52-Pin PQFP (Top View) Selection Guide Specification 7C136-15 [4] 7C146-15 7C132-25 [4] 7C136-257C142-257C146-25 7C132-307C136-307C142-307C146-30 7C132-357C136-357...

Page 3 - Maximum Ratings; Operating Range; CC; Electrical Characteristics

CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Document #: 38-06031 Rev. *E Page 3 of 15 Maximum Ratings Exceeding maximum ratings may impair the useful life of thedevice. These user guidelines are not tested. Storage Temperature ..................................... − 65°C to +150°C Ambient Temperatur...

Page 5 - Switching Characteristics

CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Document #: 38-06031 Rev. *E Page 5 of 15 Write Cycle [12] t WC Write Cycle Time 15 25 30 ns t SCE CE LOW to Write End 12 20 25 ns t AW Address Setup to Write End 12 20 25 ns t HA Address Hold from Write End 2 2 2 ns t SA Address Setup to Write Start 0 0 0...

Page 8 - Switching Waveforms

CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Document #: 38-06031 Rev. *E Page 8 of 15 Figure 6. Read Cycle No. 3 (Read with BUSY Master: CY7C132 and CY7C136/CY7C136A) Figure 7. Write Cycle No.1 (OE Three-States Data I/Os—Either Port) [12, 20] Switching Waveforms (continued) t BHA t BDD VALID t DDD t...

Page 9 - CE

CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Document #: 38-06031 Rev. *E Page 9 of 15 Figure 8. Write Cycle No. 2 (R/W Three-States Data I/Os—Either Port) [12, 21] Figure 9. Busy Timing Diagram No. 1 (CE Arbitration) Switching Waveforms (continued) t AW t WC t SCE t SA t PWE t HD t SD t HZWE t HA HI...

Page 10 - Left Address Valid First:

CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Document #: 38-06031 Rev. *E Page 10 of 15 Figure 10. Busy Timing Diagram No. 2 (Address Arbitration) Figure 11. Busy Timing Diagram No. 3 (Write with BUSY, Slave: CY7C142/CY7C146) Switching Waveforms (continued) Left Address Valid First: ADDRESS MATCH t P...

Page 11 - Interrupt Timing Diagrams; Figure 12. Left Side Sets INT

CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Document #: 38-06031 Rev. *E Page 11 of 15 Interrupt Timing Diagrams [16] Figure 12. Left Side Sets INT R Figure 13. Right Side Clears INT R Figure 14. Right Side Sets INT L Figure 15. Right Side Clears INT L Switching Waveforms (continued) WRITE 7FF t INS...

Page 12 - Figure 16. Typical DC and AC Characteristics

CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Document #: 38-06031 Rev. *E Page 12 of 15 Figure 16. Typical DC and AC Characteristics 1.4 1.0 0.4 4.0 4.5 5.0 5.5 6.0 –55 25 125 1.2 1.0 120 100 80 60 40 20 0 1.0 2.0 3.0 4.0 O U T P UT SOURC E CURR E N T (mA) SUPPLY VOLTAGE (V) NORMALIZED SUPPLY CURRENT...

Page 13 - Ordering Information

CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Document #: 38-06031 Rev. *E Page 13 of 15 Ordering Information Speed (ns) Ordering Code Package Diagram Package Type Operating Range 15 CY7C136-15JC 51-85004 52-Pin Plastic Leaded Chip Carrier Commercial CY7C136-15NC 51-85042 52-Pin Plastic Quad Flatpack ...

Page 14 - Package Diagrams

CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 Document #: 38-06031 Rev. *E Page 14 of 15 Package Diagrams Figure 17. 52-Pin Plastic Leaded Chip Carrier, 51-85004 Figure 18. 52-Pin Plastic Quad Flatpack, 51-85042 51-85004-*A 51-85042-** [+] Feedback

Page 15 - Document History Page; Worldwide Sales and Design Support

Document #: 38-06031 Rev. *E Revised March 24, 2009 Page 15 of 15 All products and company names mentioned in this document may be the trademarks of their respective holders. CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 © Cypress Semiconductor Corporation, 2005-2009. The information contained herein ...