Cypress CY7C1350G - Manuals

Page 2 - Selection Guide; Unit; Pin Configurations

CY7C1350G Document #: 38-05524 Rev. *F Page 2 of 15 Selection Guide 250 MHz 200 MHz 166 MHz 133 MHz 100 MHz Unit Maximum Access Time 2.6 2.8 3.5 4.0 4.5 ns Maximum Operating Current 325 265 240 225 205 mA Maximum CMOS Standby Current 40 40 40 40 40 mA Pin Configurations A A A A A 1 A 0 NC /288M NC /...

Page 4 - Functional Overview; Pin Definitions

CY7C1350G Document #: 38-05524 Rev. *F Page 4 of 15 Functional Overview The CY7C1350G is a synchronous-pipelined Burst SRAMdesigned specifically to eliminate wait states duringWrite/Read transitions. All synchronous inputs pass throughinput registers controlled by the rising edge of the clock. Thecl...

Page 5 - DD; Truth Table

CY7C1350G Document #: 38-05524 Rev. *F Page 5 of 15 On the subsequent clock rise the data lines are automaticallytri-stated regardless of the state of the OE input signal. Thisallows the external logic to present the data on DQs and DQP [A:D] . In addition, the address for the subsequent access (Rea...

Page 7 - Electrical Characteristics

CY7C1350G Document #: 38-05524 Rev. *F Page 7 of 15 Maximum Ratings (Above which the useful life may be impaired. For user guide-lines, not tested.) Storage Temperature ..................................... − 65°C to +150°C Ambient Temperature withPower Applied .........................................

Page 9 - Switching Characteristics

CY7C1350G Document #: 38-05524 Rev. *F Page 9 of 15 Switching Characteristics Over the Operating Range [17, 18] –250 –200 –166 –133 –100 Parameter Description Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit t POWER V DD (typical) to the first Access [13] 1 1 1 1 1 ms Clock t CYC Clock Cycle T...

Page 10 - Switching Waveforms

CY7C1350G Document #: 38-05524 Rev. *F Page 10 of 15 Switching Waveforms Read/Write Timing [19, 20, 21] Notes: 19. For this waveform ZZ is tied LOW.20. When CE is LOW, CE 1 is LOW, CE 2 is HIGH and CE 3 is LOW. When CE is HIGH, CE 1 is HIGH or CE 2 is LOW or CE 3 is HIGH. 21. Order of the Burst sequ...

Page 12 - Ordering Information

CY7C1350G Document #: 38-05524 Rev. *F Page 12 of 15 Ordering Information Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or visit www.cypress.com for actual products offered. Speed (MHz) Ordering Code Package Diagram Package Type Op...

Page 13 - Package Diagrams

CY7C1350G Document #: 38-05524 Rev. *F Page 13 of 15 Package Diagrams NOTE: 1. JEDEC STD REF MS-026 2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.0098 in (0.25 mm) PER SIDE 3. DIMENSIONS IN MILLIMETERS BODY LENGTH DIMENSIONS ARE MAX ...

Page 15 - Document History Page

CY7C1350G Document #: 38-05524 Rev. *F Page 15 of 15 Document History Page Document Title: CY7C1350G 4-Mbit (128K x 36) Pipelined SRAM with NoBL™ ArchitectureDocument Number: 38-05524 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 224380 See ECN RKF New data sheet *A 276690 See ECN...