Cypress CY7C1333H - Manuals

Page 2 - PRELIMINARY; Selection Guide; Unit; Pin Configurations

PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 2 of 12 Selection Guide CY7C1333H-133 CY7C1333H-100 Unit Maximum Access Time 6.5 8.0 ns Maximum Operating Current 225 205 mA Maximum CMOS Standby Current 40 40 mA Shaded area contains advance information. Please contact your local Cypress sale...

Page 3 - Pin Definitions

PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 3 of 12 Pin Definitions (100-pin TQFP Package) Name I/O Description A 0 , A 1 , A Input- Synchronous Address Inputs used to select one of the 64K address locations . Sampled at the rising edge of the CLK. A [1:0] are fed to the two-bit burst c...

Page 4 - Functional Overview; Single Read Accesses

PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 4 of 12 Functional Overview The CY7C1333H is a synchronous flow-through burst SRAMdesigned specifically to eliminate wait states duringWrite-Read transitions. All synchronous inputs pass throughinput registers controlled by the rising edge of ...

Page 5 - Interleaved Burst Sequence

PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 5 of 12 Linear Burst Address Table (MODE = GND) First Address A1, A0 Second Address A1, A0 Third Address A1, A0 Fourth Address A1, A0 00 01 10 11 01 10 11 00 10 11 00 01 11 00 01 10 Interleaved Burst Sequence First Address Second Address Third...

Page 6 - Truth Table for Read/Write; Read

PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 6 of 12 Truth Table for Read/Write [2, 3] Function WE BW A BW B BW C BW D Read H X X X X Write No Bytes Written L H H H H Write Byte A – (DQ A ) L L H H H Write Byte B – (DQ B ) L H L H H Write Byte C – (DQ C ) L H H L H Write Byte D – (DQ D )...

Page 7 - Maximum Ratings; Electrical Characteristics

PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 7 of 12 Maximum Ratings (Above which the useful life may be impaired. For user guide-lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature withPower Applied .................................

Page 8 - Capacitance

PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 8 of 12 Capacitance [11] Parameter Description Test Conditions 100 TQFP Package Unit C IN Input Capacitance T A = 25°C, f = 1 MHz, V DD = 3.3V V DDQ =3.3V 5 pF C CLOCK Clock Input Capacitance 5 pF C I/O I/O Capacitance 5 pF AC Test Loads and W...

Page 9 - Hold Times; Switching Waveforms; Read/Write Waveforms; Switching Characteristics; Parameter

PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 9 of 12 Hold Times t AH Address Hold after CLK Rise 0.5 0.5 ns t ALH ADV/LD Hold after CLK Rise 0.5 0.5 ns t WEH WE, BW [A:D] Hold after CLK Rise 0.5 0.5 ns t CENH CEN Hold after CLK Rise 0.5 0.5 ns t DH Data Input Hold after CLK Rise 0.5 0.5 ...

Page 10 - Commercial

PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 10 of 12 NOP, STALL and DESELECT Cycles [18, 19, 21] ZZ Mode Timing [22, 23] Switching Waveforms (continued) READ Q(A3) 4 5 6 7 8 9 10 A3 A4 A5 D(A4) 1 2 3 CLK CE WE CEN BW [A:B] ADV/LD ADDRESS DQ COMMAND WRITE D(A4) STALL WRITE D(A1) READ Q(A...

Page 11 - Package Diagram

PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 11 of 12 © Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the useof any circuitry other than circuitry embodied in ...

Page 12 - Document History Page; Issue Date; See ECN

PRELIMINARY CY7C1333H Document #: 001-00209 Rev. ** Page 12 of 12 Document History Page Document Title: CY7C1333H 2-Mbit (64K x 32) Flow-Through SRAM with NoBL™ ArchitectureDocument Number: 001-00209 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 347377 See ECN PCI New Datasheet [+...