Cypress CY7C025AV - Manuals

Page 2 - Pin Configurations

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 2 of 19 Pin Configurations Figure 1. 100-Pin TQFP (Top View) Notes 6. A 12L on the CY7C025AV. 7. A 12R on the CY7C025AV. 100 99 97 98 96 23 1 42 41 59 60 61 1213 15 14 16 4 5 40 39 95 94 17 26 910 8 7 6 11 27 28 30...

Page 4 - Selection Guide; Parameter

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 4 of 19 Figure 3. 100-Pin TQFP (Top View) Pin Configurations (continued) 100 99 97 98 96 23 1 42 41 59 60 61 1213 15 14 16 4 5 40 39 95 94 17 26 910 8 7 6 11 27 28 30 29 31 32 35 34 36 37 38 33 6766 64 65 6362 68 6...

Page 5 - Write Operation; Figure 8; Read Operation; Interrupts; Pin Definitions; Left Port

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 5 of 19 Architecture The CY7C024AV/024BV/025AV/026AV andCY7C0241AV/0251AV/036AV consist of an array of 4K, 8K, and16K words of 16 and 18 bits each of dual-port RAM cells, IO andaddress lines, and control signals (C...

Page 6 - Table 2; Busy; Table 3

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 6 of 19 3FFF for the CY7C026AV/36AV) is the mailbox for the right portand the second highest memory location (FFE for theCY7C024AV/024BV/41AV/1FFE for the CY7C025AV/51AV,3FFE for the CY7C026AV/36AV) is the mailbox ...

Page 8 - Electrical Characteristics

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 8 of 19 Maximum Ratings Exceeding maximum ratings [14] may shorten the useful life of the device. User guidelines are not tested. Storage Temperature ................................. –65°C to +150°C Ambient Temper...

Page 9 - Switching Characteristics

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 9 of 19 Figure 4. AC Test Loads and Waveforms 3.0V GND 90% 90% 10% 3 ns 3 ns 10% ALL INPUT PULSES (a) Normal Load (Load 1) R1 = 590 Ω 3.3V OUTPUT R2 = 435 Ω C = 30 pF V TH = 1.4V OUTPUT C = 30pF (b) Thévenin Equiva...

Page 10 - Data Retention Mode

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 10 of 19 Data Retention Mode The CY7C024AV/024BV/025AV/026AV andCY7C0241AV/0251AV/036AV are designed for battery backup.Data retention voltage and supply current are guaranteed overtemperature. The following rules ...

Page 11 - Switching Waveforms

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 11 of 19 Switching Waveforms Notes 29. R/W is HIGH for read cycles.30. Device is continuously selected CE = V IL and UB or LB = V IL . This waveform cannot be used for semaphore reads. 31. OE = V IL . 32. Address v...

Page 13 - Figure 10. Semaphore Read After Write Timing, Either Side

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 13 of 19 Notes 43. CE = HIGH for the duration of the above timing (both write and read cycle).44. IO 0R = IO 0L = LOW (request semaphore); CE R = CE L = HIGH. 45. Semaphores are reset (available to both ports) at c...

Page 15 - CE

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 15 of 19 Note 48. If t PS is violated, the busy signal is asserted on one side or the other, but there is no guarantee to which side BUSY is asserted. Switching Waveforms (continued) ADDRESS MATCH t PS t BLC t BHC ...

Page 16 - Right Side Clears INT

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 16 of 19 Notes 49. t HA depends on which enable pin (CE L or R/W L ) is deasserted first. 50. t INS or t INR depends on which enable pin (CE L or R/W L ) is asserted last. Switching Waveforms (continued) WRITE 1FFF...

Page 17 - Ordering Information

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 17 of 19 Ordering Information 4K x16 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code Package Diagram Package Type Operating Range 15 CY7C024AV-15AI 51-85048 100-Pin Thin Quad Flat Pack Industrial CY7C024B...

Page 18 - Package Diagram

CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV Document #: 38-06052 Rev. *J Page 18 of 19 Package Diagram Figure 17. 100-Pin Pb-Free Thin Plastic Quad Flat Pack (TQFP) A100 16K x18 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code Package Name Package Type Operating Range 20 CY7C036AV-2...

Page 19 - Document History Page; Worldwide Sales and Design Support; Change

Document #: 38-06052 Rev. *J Revised December 10, 2008 Page 19 of 19 All products and company names mentioned in this document may be the trademarks of their respective holders. CY7C024AV/024BV/025AV/026AV CY7C0241AV/0251AV/036AV © Cypress Semiconductor Corporation, 2001-2008. The information contai...