Cypress CY7B9911V - Manuals

Page 2 - Signal Name; “Test Mode”; PLCC

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 2 of 14 Pin Configuration Pin Definitions Signal Name IO Description REF I Reference frequency input. This input supplies the frequency and timing against which all functional variations are measured. FB I PLL feedback input (typicall...

Page 3 - Block Diagram Description; Phase Frequency Detector and Filter; Table 1; Skew Select Matrix; Table 2

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 3 of 14 Block Diagram Description Phase Frequency Detector and Filter The Phase Frequency Detector and Filter blocks accept inputsfrom the Reference Frequency (REF) input and the Feedback(FB) input. They generate correction informatio...

Page 4 - Test Mode; “Block Diagram

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 4 of 14 Figure 1 shows the typical outputs with FB connected to a zero skew output. [4] Test Mode The TEST input is a three level input. In normal systemoperation, this pin is connected to ground, allowing theCY7B9911V to operate as d...

Page 5 - Operational Mode Descriptions; Figure 2; Figure 2. Zero Skew and Zero Delay Clock Driver

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 5 of 14 Operational Mode Descriptions Figure 2 shows the LVPSCB configured as a zero skew clock buffer. In this mode the CY7B9911V is used as the basis for a low skew clock distribution tree. When all the function select inputs (xF0, ...

Page 6 - Figure 4. Inverted Output Connections

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 6 of 14 groups, and the PLL aligns the rising edges of REF and FB, youcan create wider output skews by proper selection of the xFninputs. For example, a +10 tU between REF and 3Qx is achievedby connecting 1Q0 to FB and setting 1F0 = 1...

Page 7 - Figure 8

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 7 of 14 frequency, while still maintaining the low skew characteristics ofthe clock driver. The LVPSCB performs all of the functionsdescribed in this section at the same time. It can multiply by two and four or divide by two (and four...

Page 8 - Electrical Characteristics

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 8 of 14 Maximum Ratings Operating outside these boundaries may affect the performanceand life of the device. These user guidelines are not tested. Storage Temperature ................................. –65°C to +150°C Ambient Temperatu...

Page 9 - Capacitance; AC Test Loads and Waveforms

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 9 of 14 Capacitance Tested initially and after any design or process changes that may affect these parameters. [10] Parameter Description Test Conditions Max Unit C IN Input Capacitance T A = 25°C, f = 1 MHz, V CC = 3.3V 10 pF Note 10...

Page 10 - Switching Characteristics – 7 Option

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 10 of 14 Switching Characteristics – 7 Option Over the Operating Range [2, 11] Parameter Description CY7B9911V-7 Unit Min Typ Max f NOM Operating Clock Frequency in MHz FS = LOW [1, 2] 15 30 MHz FS = MID [1, 2] 25 50 FS = HIGH [1, 2 ,...

Page 11 - AC Timing Diagrams

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 11 of 14 AC Timing Diagrams t ODCV t ODCV t REF REF FB Q OTHER Q INVERTED Q REF DIVIDED BY 2 REF DIVIDED BY 4 t RPWH t RPWL t PD t SKEWPR, t SKEW0, 1 t SKEWPR, t SKEW0, 1 t SKEW2 t SKEW2 t SKEW3, 4 t SKEW3, 4 t SKEW3, 4 t SKEW1, 3, 4 ...

Page 12 - Ordering Information; Ordering Code

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 12 of 14 Ordering Information Accuracy (ps) Ordering Code Package Type Operating Range 500 CY7B9911V-5JC 32-Pb Plastic Leaded Chip Carrier Commercial 500 CY7B9911V-5JCT 32-Pb Plastic Leaded Chip Carrier – Tape and Reel Commercial 700 ...

Page 13 - Package Diagram; Figure 10. 32-Pin Plastic Leaded Chip Carrier J65

CY7B9911V 3.3V RoboClock+™ Document Number: 38-07408 Rev. *D Page 13 of 14 Package Diagram Figure 10. 32-Pin Plastic Leaded Chip Carrier J65 51-85002-*B [+] Feedback

Page 14 - Document History Page; High Speed Low Voltage Programmable Skew Clock Buffer

Document Number: 38-07408 Rev. *D Revised June 20, 2007 Page 14 of 14 PSoC Designer™, Programmable System-on-Chip™, and PSoC Express™ are trademarks and PSoC® is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registeredtrademarks referenced herein are property of the r...