Page 2 - Pin Configuration; Top View; Product Portfolio; Notes; by tying the BYTE signal to V; to IO
CY62167E MoBL ® Document #: 001-15607 Rev. *A Page 2 of 12 Pin Configuration [2, 3] 48-Pin TSOP I Top View Product Portfolio Product V CC Range (V) Speed (ns) Power Dissipation Operating I CC (mA) Standby I SB2 ( µ A) f = 1 MHz f = f max Min Typ [4] Max Typ [4] Max Typ [4] Max Typ [4] Max CY62167ELL...
Page 3 - Electrical Characteristics
CY62167E MoBL ® Document #: 001-15607 Rev. *A Page 3 of 12 Maximum Ratings Exceeding the maximum ratings may shorten the battery life of the device. User guidelines are not tested.Storage Temperature ................................ –65°C to + 150°CAmbient Temperature with Power Applied ...............
Page 4 - Full device operation requires linear V; ramp from V; to V; s or stable at V
CY62167E MoBL ® Document #: 001-15607 Rev. *A Page 4 of 12 AC Test Loads and Waveforms V CC V CC OUTPUT R2 30 pF INCLUDING JIG AND SCOPE GND 90% 10% 90% 10% RISE TIME= 1 V/ns FALL TIME= 1 V/ns OUTPUT V EQUIVALENT TO: THÉVENIN EQUIVALENT ALL INPUT PULSES R TH R1 Parameters Values Unit R1 1800 Ω R2 99...
Page 5 - Switching Characteristics; “AC Test Loads and Waveforms” on page 4
CY62167E MoBL ® Document #: 001-15607 Rev. *A Page 5 of 12 Switching Characteristics Over the Operating Range [13, 14] Parameter Description 45 ns Unit Min Max READ CYCLE t RC Read Cycle Time 45 ns t AA Address to Data Valid 45 ns t OHA Data Hold from Address Change 10 ns t ACE CE 1 LOW and CE 2 HIG...
Page 6 - Switching Waveforms; Figure 1
CY62167E MoBL ® Document #: 001-15607 Rev. *A Page 6 of 12 Switching Waveforms Figure 1 shows address transition controlled read cycle waveforms. [18, 19] Figure 1. Read Cycle No. 1 Figure 2 shows OE controlled read cycle waveforms. [19, 20] Figure 2. Read Cycle No. 2 PREVIOUS DATA VALID DATA VALID ...
Page 7 - goes HIGH and CE; , the output remains in a high impedance state.
CY62167E MoBL ® Document #: 001-15607 Rev. *A Page 7 of 12 Figure 3 shows WE controlled write cycle waveforms. [17, 21, 22] Figure 3. Write Cycle No. 1 Switching Waveforms (continued) t HD t SD t PWE t SA t HA t AW t SCE t WC t HZOE VALID DATA t BW NOTE 23 CE 1 ADDRESS CE 2 WE DATA IO OE BHE/BLE Not...
Page 8 - HZWE
CY62167E MoBL ® Document #: 001-15607 Rev. *A Page 8 of 12 Figure 4 shows CE 1 or CE 2 controlled write cycle waveforms. [17, 21, 22] Figure 4. Write Cycle No. 2 Figure 5 shows WE controlled, OE LOW write cycle waveforms. [22] Figure 5. Write Cycle No. 3 Switching Waveforms (continued) t HD t SD t P...
Page 9 - Figure 6
CY62167E MoBL ® Document #: 001-15607 Rev. *A Page 9 of 12 Figure 6 shows BHE/BLE controlled, OE LOW write cycle waveforms. [22] Figure 6. Write Cycle No. 4 Switching Waveforms (continued) t HD t SD t SA t HA t AW t WC VALID DATA t BW t SCE t PWE NOTE 23 CE 1 ADDRESS CE 2 WE DATA IO BHE/BLE [+] Feed...
Page 11 - Package Diagram
CY62167E MoBL ® Document #: 001-15607 Rev. *A Page 11 of 12 © Cypress Semiconductor Corporation, 2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the useof any circuitry other than circuitry embodied in a Cypr...
Page 12 - Document History Page; Change; max
CY62167E MoBL ® Document #: 001-15607 Rev. *A Page 12 of 12 Document History Page Document Title: CY62167E MoBL ® 16-Mbit (1M x 16 / 2M x 8) Static RAM Document Number: 001-15607 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 1103145 See ECN VKN New Data Sheet *A 1138903 See ECN VK...