Cypress CY62146DV30 - Manuals

CY62146DV30 Document #: 38-05339 Rev. *A Page 5 of 11 Switching Characteristics Over the Operating Range [12] Parameter Description 45 ns [10] 55 ns 70 ns Unit Min. Max. Min. Max. Min. Max. Read Cycle t RC Read Cycle Time 45 55 70 ns t AA Address to Data Valid 45 55 70 ns t OHA Data Hold from Addres...

CY62146DV30 Document #: 38-05339 Rev. *A Page 6 of 11 Switching Waveforms Read Cycle 1 (Address Transition Controlled) [16, 17] Read Cycle No. 2 (OE Controlled) [17, 18] Notes: 16. The device is continuously selected. OE, CE = V IL , BHE and/or BLE = V IL . 17. WE is HIGH for read cycle.18. Address ...

CY62146DV30 Document #: 38-05339 Rev. *A Page 7 of 11 Write Cycle No. 1 (WE Controlled) [15, 19, 20] Write Cycle No. 2 (CE Controlled) [15, 19, 20] Notes: 19. Data I/O is high impedance if OE = V IH . 20. If CE goes HIGH simultaneously with WE = V IH , the output remains in a high-impedance state. 2...

CY62146DV30 Document #: 38-05339 Rev. *A Page 10 of 11 © Cypress Semiconductor Corporation, 2005. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the useof any circuitry other than circuitry embodied in a Cypress p...

CY62146DV30 Document #: 38-05339 Rev. *A Page 11 of 11 Document History Page Document Title:CY62146DV30 MoBL ® 4-Mbit (256K x 16) Static RAM Document Number: 38-05339 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 213251 See ECN AJU New Data Sheet *A 316039 See ECN PCI Added 45-ns ...