Cypress CY2291 - Manuals

CY2291 Document #: 38-07189 Rev. *C Page 2 of 12 Pinouts Figure 1. CY2291- 20-pin SOIC Pin Definitions Name Pin Number Description 32XOUT 1 32.768-kHz crystal feedback. 32K 2 32.768-kHz output (always active if VBATT is present). CLKC 3 Configurable clock output C. VDD 4, 16 Voltage supply. GND 5 Gr...

CY2291 Document #: 38-07189 Rev. *C Page 3 of 12 Operation The CY2291 is a third-generation family of clock generators. TheCY2291 is upwardly compatible with the industry standardICD2023 and ICD2028 and continues their tradition by providinga high level of customizable features to meet the diverse c...

CY2291 Document #: 38-07189 Rev. *C Page 9 of 12 t 6 Output Enable Time Time for output to leave three-state mode after SHUTDOWN/OE goes HIGH 10 15 ns t 7 Skew Skew delay between any identical or related outputs [3, 12, 15] < 0.25 0.5 ns t 8 CPUCLK Slew Frequency transition rate 1.0 20.0 MHz/ms t...