NEC uPD75P3116 - Manuals - manualsarea.com

Page 2 - FUNCTION OUTLINE

µ PD75P3116 2 Data Sheet U11369EJ3V0DS FUNCTION OUTLINE Item Function Instruction execution time • 0.95, 1.91, 3.81, or 15.3 µ s (main system clock: @ 4.19 MHz) • 0.67, 1.33, 2.67, or 10.7 µ s (main system clock: @ 6.0 MHz) • 122 µ s (subsystem clock: @ 32.768 kHz) Internal memory PROM 16384 × 8 bit...

Page 4 - Always connect the V; during normal operation.; BIAS

µ PD75P3116 4 Data Sheet U11369EJ3V0DS 1. PIN CONFIGURATION (TOP VIEW) • 64-pin plastic QFP (14 × 14): µ PD75P3116GC-AB8 • 64-pin plastic LQFP (12 × 12): µ PD75P3116GK-8A8 • 64-pin plastic LQFP (14 × 14): µ PD75P3116GC-8BS Note Always connect the V PP pin directly to V DD during normal operation. 48...

Page 5 - PIN IDENTIFICATIONS

µ PD75P3116 5 Data Sheet U11369EJ3V0DS PIN IDENTIFICATIONS P00 to P03: Port 0 COM0 to COM3: Common output 0 to 3 P10 to P13: Port 1 V LC0 to V LC2 : LCD power supply 0 to 2 P20 to P23: Port 2 BIAS: LCD power supply bias control P30 to P33: Port 3 LCDCL: LCD clock P50 to P53: Port 5 SYNC: LCD synchro...

Page 9 - pin does not operate correctly when it is not connected to the V; pin during normal operation.

µ PD75P3116 9 Data Sheet U11369EJ3V0DS 3.2 Non-Port Pins (1/2) Pin Name I/O Alternate Function Status I/O Circuit Function After Reset Type Note 1 TI0 Input P13 External event pulse input to timer/event counter Input <B>-C TI1 P12/INT2/TI2 TI2 P12/INT2/TI1 PTO0 Output P20 Timer/event counter o...

Page 10 - When the split resistor is incorporated:; Low level

µ PD75P3116 10 Data Sheet U11369EJ3V0DS 3.2 Non-Port Pins (2/2) Pin Name I/O Alternate Function Status I/O Circuit Function After Reset Type S0 to S15 Output — Segment signal output Note 1 G-A S16 to S19 Output P93 to P90 Segment signal output Input H S20 to S23 Output P83 to P80 Segment signal outp...

Page 14 - Mk I AND Mk II MODE SELECTION FUNCTION; Setting the stack bank selection (SBS) register for the; Differences Between Mk I Mode and Mk II Mode

µ PD75P3116 14 Data Sheet U11369EJ3V0DS 4. Mk I AND Mk II MODE SELECTION FUNCTION Setting the stack bank selection (SBS) register for the µ PD75P3116 enables the program memory to be switched between the Mk I mode and Mk II mode. This function is applicable when using the µ PD75P3116 to evaluate the...

Page 15 - at the beginning of the program. When using the Mk II mode,; Set the desired value for; Figure 4-1. Format of Stack Bank Selection Register

µ PD75P3116 15 Data Sheet U11369EJ3V0DS 4.2 Setting of Stack Bank Selection (SBS) Register Use the stack bank selection register to switch between the Mk I mode and Mk II mode. Figure 4-1 shows the format of the stack bank selection register. The stack bank selection register is set using a 4-bit me...

Page 16 - DIFFERENCES BETWEEN; User’s Manual

µ PD75P3116 16 Data Sheet U11369EJ3V0DS 5. DIFFERENCES BETWEEN µ PD75P3116 AND µ PD753104, 753106, 753108 The µ PD75P3116 replaces the internal mask ROM in the µ PD753104, 753106, and 753108 with a one-time PROM and features expanded ROM capacity. The µ PD75P3116’s Mk I mode supports the Mk I mode i...

Page 17 - MEMORY CONFIGURATION; Can only be used in the Mk II mode.; Remark; to addresses with changes in the PC’s lower 8 bits only.

µ PD75P3116 17 Data Sheet U11369EJ3V0DS 6. MEMORY CONFIGURATION Figure 6-1. Program Memory Map Note Can only be used in the Mk II mode. Remark For instructions other than those noted above, the BR PCDE and BR PCXA instructions can be used to branch to addresses with changes in the PC’s lower 8 bits ...

Page 18 - Memory bank 0 or 1 can be selected as the stack area.

µ PD75P3116 18 Data Sheet U11369EJ3V0DS Figure 6-2. Data Memory Map Note Memory bank 0 or 1 can be selected as the stack area. (32 × 4) 256 × 4 (224 × 4) 128 × 4 0 1 15 000H 01FH 020H 0FFH 100H 1E0H 1DFH 1F7H1F8H F80H FFFH General-purpose register area Display data memory Data area static RAM (512 ×...

Page 19 - + or – symbols are keywords that should be entered as they are.

µ PD75P3116 19 Data Sheet U11369EJ3V0DS 7. INSTRUCTION SET (1) Representation and coding formats for operands In the instruction’s operand area, use the following coding format to describe operands corresponding to the instruction’s operand representations (for further details, refer to the RA75X As...

Page 21 - (3) Description of symbols used in addressing area; MB indicates access-enabled memory banks.; . Use the PCC setting to select from among four cycle

µ PD75P3116 21 Data Sheet U11369EJ3V0DS (3) Description of symbols used in addressing area Remarks 1. MB indicates access-enabled memory banks. 2. In area *2, MB = 0 for both MBE and MBS. 3. In areas *4 and *5, MB = 15 for both MBE and MBS. 4. Areas *6 to *11 indicate corresponding address-enabled a...

Page 22 - Only the lower 3 bits in the B register are valid.

µ PD75P3116 22 Data Sheet U11369EJ3V0DS Instruction Mnemonic Operand No. of Machine Operation Addressing Skip Group Bytes Cycle Area Condition Transfer MOV A, #n4 1 1 A ← n4 String-effect A reg1, #n4 2 2 reg1 ← n4 XA, #n8 2 2 XA ← n8 String-effect A HL, #n8 2 2 HL ← n8 String-effect B rp2, #n8 2 2 r...

Page 25 - Only the lower two bits in the B register are valid.

µ PD75P3116 25 Data Sheet U11369EJ3V0DS Instruction Mnemonic Operand No. of Machine Operation Addressing Skip Group Bytes Cycle Area Condition Branch BR Note 1 addr — — PC 13-0 ← addr *6 Use the assembler to select themost appropriate instructionamong the following. • BR !addr• BRCB !caddr• BR $addr...

Page 28 - Caution; When +6 V is applied to the V

µ PD75P3116 28 Data Sheet U11369EJ3V0DS 8. ONE-TIME PROM (PROGRAM MEMORY) WRITE AND VERIFY The program memory contained in the µ PD75P3116 is a 16384 × 8-bit one-time PROM that can be electrically written one time only. The pins listed in the table below are used for this PROM’s write/verify operati...

Page 29 - Program Memory Write Procedure; Data input

µ PD75P3116 29 Data Sheet U11369EJ3V0DS 8.2 Program Memory Write Procedure Program memory can be written at high speed using the following procedure. (1) Pull down unused pins to Vss via resistors. Set the X1 pin to low. (2) Supply 5 V to the V DD and V PP pins. (3) Wait 10 µ s. (4) Select the progr...

Page 30 - Program Memory Read Procedure

µ PD75P3116 30 Data Sheet U11369EJ3V0DS V PP V DD V DD + 1 V DD V PP V DD X1 Data output Data output MD0/P30 MD2/P32 MD3/P33 MD1/P31 “L” D0/P60 to D3/P63D4/P50 to D7/P53 8.3 Program Memory Read Procedure The µ PD75P3116 can read program memory contents using the following procedure. (1) Pull down un...

Page 31 - the PROM should be verified via screening.; Storage Temperature

µ PD75P3116 31 Data Sheet U11369EJ3V0DS 8.4 One-Time PROM Screening Due to its structure, the one-time PROM cannot be fully tested before shipment by NEC. Therefore, NEC recommends that after the required data is written and the PROM is stored under the temperature and time conditions shown below, t...

Page 32 - μμμμμ; ELECTRICAL SPECIFICATIONS; Absolute Maximum Ratings (T; Note When LCD is driven in normal mode: T

µµµµµ PD75P3116 32 Data Sheet U11369EJ3V0DS 9. ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (T A = 25˚C) Parameter Symbol Test Conditions Rating Unit Power supply voltage V DD –0.3 to +7.0 V PROM power supply V PP –0.3 to +13.5 V voltage Input voltage V I1 Except port 5 –0.3 to V DD + 0.3 V V ...

Page 33 - Main System Clock Oscillator Characteristics (T; When the power supply voltage is 1.8 V; or releasing; • Keep the wiring length as short as possible.; • Do not fetch signals from the oscillator.

µµµµµ PD75P3116 33 Data Sheet U11369EJ3V0DS Main System Clock Oscillator Characteristics (T A = –40 to +85 ° C, V DD = 1.8 to 5.5 V) Resonator Recommended Constant Parameter Test Conditions MIN. TYP. MAX. Unit Ceramic Oscillation 1.0 6.0 Note 2 MHz resonator frequency (fx) Note 1 Oscillation After V...

Page 34 - Subsystem Clock Oscillator Characteristics (T

µ PD75P3116 34 Data Sheet U11369EJ3V0DS Subsystem Clock Oscillator Characteristics (T A = –40 to +85˚C, V DD = 1.8 to 5.5 V) Resonator Recommended Constant Parameter Test Conditions MIN. TYP. MAX. Unit Crystal Oscillation 32 32.768 35 kHz resonator frequency (f XT ) Note 1 Oscillation V DD = 4.5 to ...

Page 35 - DC Characteristics (T

µµµµµ PD75P3116 35 Data Sheet U11369EJ3V0DS DC Characteristics (T A = –40 to +85˚C, V DD = 1.8 to 5.5 V) Parameter Symbol Test Conditions MIN. TYP. MAX. Unit Output current, low I OL Per pin 15 mA Total of all pins 150 mA Input voltage, high V IH1 Ports 2, 3, 8, and 9 2.7 ≤ V DD ≤ 5.5 V 0.7V DD V DD...

Page 37 - AC Characteristics (T; Supply voltage V

µ PD75P3116 37 Data Sheet U11369EJ3V0DS AC Characteristics (T A = –40 to +85˚C, V DD = 1.8 to 5.5 V) Parameter Symbol Test Conditions MIN. TYP. MAX. Unit CPU clock cycle t CY Operating on V DD = 2.7 to 5.5 V 0.67 64 µ s time Note 1 main system clock V DD = 1.8 to 5.5 V 0.95 64 µ s (Min. instruction ...

Page 38 - Serial Transfer Operation; and C

µµµµµ PD75P3116 38 Data Sheet U11369EJ3V0DS Serial Transfer Operation 2-wire and 3-wire serial I/O mode (SCK...Internal clock output): (T A = –40 to +85˚C, V DD = 1.8 to 5.5 V) Parameter Symbol Test Conditions MIN. TYP. MAX. Unit SCK cycle time t KCY1 V DD = 2.7 to 5.5 V 1300 ns V DD = 1.8 to 5.5 V ...

Page 40 - Clock Timing; X1 input

µ PD75P3116 40 Data Sheet U11369EJ3V0DS AC Timing Test Points (Excluding X1, XT1 Input) Clock Timing TI0, TI1, TI2 Timing TI0, TI1, TI2 1/f TI t TIL t TIH X1 input 1/f X t XL t XH 0.1 V V DD – 0.1 V XT1 input 1/f XT t XTL t XTH 0.1 V V DD – 0.1 V V IH (MIN.) V IL (MAX.) V IH (MIN.) V IL (MAX.) V OH ...

Page 41 - Serial Transfer Timing; SCK

µ PD75P3116 41 Data Sheet U11369EJ3V0DS Serial Transfer Timing 3-wire serial I/O mode 2-wire serial I/O mode t KCY1, 2 t KL1, 2 t KH1, 2 SCK SI SO t SIK1, 2 t KSI1, 2 t KSO1, 2 Input data Output data t KSO1, 2 t SIK1, 2 t KL1, 2 t KH1, 2 SCK t KSI1, 2 SB0, 1 t KCY1, 2

Page 42 - RESET

µ PD75P3116 42 Data Sheet U11369EJ3V0DS t KCY3, 4 t KH3, 4 t KSI3, 4 t SIK3, 4 t KSO3, 4 SCK SB0, 1 t KL3, 4 t SBK t KSB t KCY3, 4 t KH3, 4 t KSI3, 4 t SIK3, 4 t KSO3, 4 SCK SB0, 1 t KL3, 4 t SBK t SBH t SBL t KSB Serial Transfer Timing Bus release signal transfer Command signal transfer Interrupt i...

Page 43 - unstable operation at the start of oscillation.

µ PD75P3116 43 Data Sheet U11369EJ3V0DS Data Memory Stop Mode Low Supply Voltage Data Retention Characteristics (T A = –40 to +85˚C) Parameter Symbol Test Conditions MIN. TYP. MAX. Unit Release signal set time t SREL 0 µ s Oscillation stabilization t WAIT Release by RESET 2 15 /f X ms wait time Note...

Page 44 - Data Retention Timing (STOP Mode Release by RESET)

µ PD75P3116 44 Data Sheet U11369EJ3V0DS Data Retention Timing (STOP Mode Release by RESET) Data Retention Timing (Standby Release Signal: STOP Mode Release by Interrupt Signal) V DD RESET STOP instruction execution STOP mode Data retention mode Internal reset operation HALT mode Operating mode t SRE...

Page 45 - DC Programming Characteristics (T

µµµµµ PD75P3116 45 Data Sheet U11369EJ3V0DS DC Programming Characteristics (T A = 25 ± 5˚C, V DD = 6.0 ± 0.25 V, V PP = 12.5 ± 0.3 V, V SS = 0 V) Parameter Symbol Test Conditions MIN. TYP. MAX. Unit Input voltage, high V IH1 Except X1 and X2 pins 0.7V DD V DD V V IH2 X1, X2 V DD – 0.5 V DD V Input v...

Page 46 - Data output

µ PD75P3116 46 Data Sheet U11369EJ3V0DS Program Memory Write Timing Program Memory Read Timing t VPS t VDS t XH t XL t I t DS t DH t DV t DF t DS t DH t AH t AS t PW t M1R t M0S t OPW t M1S t M1H t PCR t M3S t M3H Data input Data output Data input Data input V PP V DD V DD + 1 V DD V PP V DD X1 D0/P...

Page 47 - Supply voltage V; Supply current I; vs V

µµµµµ PD75P3116 47 Data Sheet U11369EJ3V0DS 10. CHARACTERISTIC CURVES (REFERENCE VALUES) 10 5.0 1.0 0.5 0.1 0.05 0.01 0.005 0.001 0 1 2 3 4 5 6 7 8 (T A = 25 ° C) Supply voltage V DD (V) Supply current I DD (mA) PCC = 0010 PCC = 0001 PCC = 0000 Main system clockHALT mode + 32 kHz oscillation XT1 XT2...

Page 49 - N O T E; detail of lead end

µ PD75P3116 49 Data Sheet U11369EJ3V0DS 48 49 32 64 1 17 16 33 64-PIN PLASTIC QFP (14x14) N O T E Each lead centerline is located within 0.15 mm ofits true position (T.P.) at maximum material condition. I T E M M I L L I M E T E R S A B D G 1 7 . 6 ± 0 . 4 1 4 . 0 ± 0 . 2 0 . 8 ( T . P . ) 1 . 0 J 1...

Page 52 - RECOMMENDED SOLDERING CONDITIONS; The; Note After opening the dry pack, store it at 25; C or less and 65% RH or less for the allowable storage period.

µ PD75P3116 52 Data Sheet U11369EJ3V0DS 12. RECOMMENDED SOLDERING CONDITIONS The µ PD75P3116 should be soldered and mounted under the conditions recommended in the table below. For details of recommended soldering conditions, refer to the information document Semiconductor Device Mounting Technology...

Page 54 - APPENDIX A. LIST OF

µ PD75P3116 54 Data Sheet U11369EJ3V0DS APPENDIX A. LIST OF µ PD75308B, 753108, AND 75P3116 FUNCTIONS Parameter µ PD75308B µ PD753108 µ PD75P3116 Program memory Mask ROM Mask ROM One-time PROM 0000H to 1F7FH 0000H to 1FFFH 0000H to 3FFFH (8064 × 8 bits) (8192 × 8 bits) (16384 × 8 bits) Data memory 0...

Page 56 - APPENDIX B. DEVELOPMENT TOOLS; OS for

µ PD75P3116 56 Data Sheet U11369EJ3V0DS APPENDIX B. DEVELOPMENT TOOLS The following development tools have been provided for system development using the µ PD75P3116. In the 75XL Series, a common relocatable assembler is used in combination with a device file dedicated to each model. RA75X relocatab...

Page 57 - PROM Write Tools; IBM PCs

µ PD75P3116 57 Data Sheet U11369EJ3V0DS PROM Write Tools Hardware PG-1500 This is a PROM writer that can program a single-chip microcontroller with PROM in stand-alonemode or under the control of a host machine when connected with the supplied accessory boardand optional programmer adapter.It can al...

Page 58 - Debugging Tools; This is a product of TOKYO ELETECH CORPORATION.

µ PD75P3116 58 Data Sheet U11369EJ3V0DS Debugging Tools An in-circuit emulator (IE-75001-R) is provided as a program debugging tool for the µ PD75P3116. The system configuration using this in-circuit emulator is shown below. Hardware IE-75001-R The IE-75001-R is an in-circuit emulator to be used for...

Page 59 - OS for IBM PCs; The following operating systems for IBM PCs are supported.; OS; IBM DOS; Only English mode is supported.

µ PD75P3116 59 Data Sheet U11369EJ3V0DS OS for IBM PCs The following operating systems for IBM PCs are supported. OS Version PC DOS TM Ver.3.1 to 6.3J6.1/V Note to J6.3/V Note MS-DOS Ver.5.0 to 6.25.0/V Note to 6.2/V Note IBM DOS TM J5.02/V Note Note Only English mode is supported. Caution Ver. 5.0 ...

Page 62 - G F E D

µ PD75P3116 62 Data Sheet U11369EJ3V0DS Package Drawing of Conversion Adapter (TGK-064SBW) Figure B-3. TGK-064SBW Package Drawing (For Reference Only) I T E M M I L L I M E T E R S I N C H E S b 1 . 8 5 0 . 0 7 3 c 3 . 5 0 . 1 3 8 a 0 . 3 0 . 0 1 2 d 2 . 0 0 . 0 7 9 h 5 . 9 0 . 2 3 2 i 0 . 8 0 . 0 3...

Page 63 - Notes on Target System Design; and conversion socket or conversion adapter.

µ PD75P3116 63 Data Sheet U11369EJ3V0DS Notes on Target System Design The following shows a diagram of the connection conditions between the emulation probe, conversion connector and conversion socket or conversion adapter. Design your system making allowances for conditions such as the form of part...

Page 65 - APPENDIX C. RELATED DOCUMENTS; versions are not marked as such.; Documents Related to Devices

µ PD75P3116 65 Data Sheet U11369EJ3V0DS APPENDIX C. RELATED DOCUMENTS The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. Documents Related to Devices Document Name Document No. µ PD753104, 753106, 753108 Data Sh...

Page 66 - Other Related Documents; Document Name

µ PD75P3116 66 Data Sheet U11369EJ3V0DS Other Related Documents Document Name Document No. SEMICONDUCTOR SELECTION GUIDE – Products & Packages – X13769E Semiconductor Device Mounting Technology Manual C10535E Quality Grades on NEC Semiconductor Devices C11531E NEC Semiconductor Device Reliabilit...

Page 68 - NOTES FOR CMOS DEVICES; PRECAUTION AGAINST ESD FOR SEMICONDUCTORS; to be taken for PW boards with semiconductor devices on it.; HANDLING OF UNUSED INPUT PINS FOR CMOS; pin should be connected to V; or GND with a resistor, if it is considered to have a possibility of; STATUS BEFORE INITIALIZATION OF MOS DEVICES; having reset function.

µ PD75P3116 68 Data Sheet U11369EJ3V0DS NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static ...

Page 69 - Regional Information; Device availability; Branch The Netherlands

µ PD75P3116 69 Data Sheet U11369EJ3V0DS Regional Information Some information contained in this document may vary from country to country. Before using any NECproduct in your application, pIease contact the NEC office in your country to obtain a list of authorizedrepresentatives and distributors. Th...

Page 70 - s u p p o r t s y s t e m s a n d m e d i c a l e q u i p m e n t f o r l i f e s u p p o r t , e t c .

µ PD75P3116 QTOP is a trademark of NEC Corporation.MS-DOS is either a registered trademark or a trademark of Microsoft Corporation in the United States and/orother countries.IBM DOS, PC/AT, and PC DOS are trademarks of International Business Machines Corporation. The export of this product from Japa...