Epson SED1278F/D- Manuals

EPSON 2–1 SED1200 Series SED1200 Series FEATURES • Internal display RAM to hold 20 8-bit character codes.• Internal character generator – CGROM: 160 JIS ASCII characters. – CGRAM: 4 u s e r p r o g r a m m a b l e 5 × 8 p i x e l characters – Font: 5 × 7 pixel characters plus the underline cursor. –...

2–2 EPSON SED1200 Series BLOCK DIAGRAM SEG 1 to SEG 50 V DD V SS V LCD COM 1 to COM 16 WR RD A0 CS DB0 DB1 DB2 DB3 XG DDRAM CGRAM CGROM Data control Segment signal generator Segment driver CGRAM control Read/Write control Read/Write control Addressdecoder Addressdecoder Addressdecoder Oscillator Inp...

EPSON 2–3 SED1200 Series SED1200 Series PINOUT 64 60 55 50 45 41 1 65 70 75 80 40 35 30 25 5 10 (TOP VIEW) SED1200F Package Outline 15 20 24 20 15 10 5 1 45 50 SED1200D Die Outline 55 60 25 30 35 40 80 75 70 65

2–4 EPSON SED1200 Series TABLE 1. SED1200 Pinout No. NAME 1 SEG17 2 SEG16 3 SEG15 4 SEG14 5 SEG13 6 SEG12 7 SEG11 8 SEG10 9 SEG9 10 SEG8 11 SEG7 12 SEG6 13 SEG5 14 SEG4 15 SEG3 16 SEG2 17 SEG1 18 COM1 19 COM2 20 COM3 No. NAME 21 COM4 22 COM5 23 COM6 24 COM7 25 COM8 26 A0 27 CS 28 RD 29 WR 30 Φ 31 X ...

EPSON 2–5 SED1200 Series SED1200 Series PIN DESCRIPTION CPU Interface CS Active low chip select input. RD Active low read enable input. WR Active low write strobe. A0 Selects between instruction and display dataaccess.A0 = H: Display dataA0 = L: Instruction D0–D2 Active high CPU data inputs. D3 Acti...

2–6 EPSON SED1200 Series Write Commands SET CURSOR DIRECTION Sets the way in which the cursor address register changesas character data is written to the SED1200 by the CPU,and hence the direction of cursor movement. D = 0: Address register increment directionD = 1: Address register decrement direct...

EPSON 2–7 SED1200 Series SED1200 Series SET CHARACTER CODE Writes the character code given by C 7 –C 0 into the character data RAM at the location pointed to by thecontents of the cursor address register. The contents ofthe cursor address register are then modified as specifiedby the last SET CURSOR...

2–8 EPSON SED1200 Series Electrical Specifications DC Characteristics V DD = 5 V V SS = 0 V, T a = –10 to +70 ° C Parameter Symbol Condition Rating Unit Pin min typ max Logic supply voltage V DD 4.5 5.0 5.5 V V DD Liquid crystal display supply V LCD V DD –5.5 — V DD –3.5 V V LCD voltage Oscillator f...

2–10 EPSON SED1200 Series AC Characteristics MPU Read Timing A0 t AR t RA t CR t RC t RP t RD t f t r t RH Busy flag 2.4V 2.0V 0.4V 0.8V DB3 ( A0 , CS , RD , φ ) CS RD V DD = 4.5 to 5.5 V, Ta = –10 to 70 ° C. Note: Load on pin DB3 is C L = 100 pF. Parameter Symbol Rating Unit min typ max Setup time ...

EPSON 2–13 SED1200 Series SED1200 Series OPERATION Data Input/Output Because the command codes are 8-bits wide and theSED1200’s data bus is only 4-bits wide, the commandcodes must be split into two nibbles (4-bits), which arewritten separately. The high-order nibble is written first, and is latchedi...

2–14 EPSON SED1200 Series Loading CGRAM The character generator RAM is loaded with a characterbit pattern using a combination of one SET CGRAMADDRESS command and eight SET CGRAM DATAcommands. For example, to load the character shown infigure 2 into the area of CGRAM corresponding tocharacter code 01...

EPSON 2–15 SED1200 Series SED1200 Series Mechanical Specifications SED1200F Package Dimensions 0.992 ± 0.016 (25.2 ± 0.4 ) 0.551 ± 0.004 (14.0 ± 0.1 ) 0.006 ± 0.002 (0.15 ± 0.05 ) 0.079 ± 0.004 (2.0 ± 0.1 ) 0.756 ± 0.016 (19.2 ± 0.4 ) 0.787 ± 0.004 (20.0 ± 0.1 ) 0.031 ± 0.006 (0.8 ± 0.15 ) 0.014 ± 0...

EPSON 2–17 SED1200 Series SED1200 Series APPLICATION NOTES Display Oscillator The SED1200 has an internal oscillator to generate thetiming signals required for the LCD display.If the internal oscillator is used, connect the feedbackresistor Rf as shown in figure 3. The feedback resistorleads must be...

2–18 EPSON SED1200 Series Command Clock ( Φ ) When the system MPU issues a command to the SED1200,the timing for the execution of the command is derivedfrom Φ , the command clock. This would normally be the system MPU clock.The maximum execution time for a command is 16/ Φ . For example if Φ = 1 MHz...

EPSON 2–21 SED1200 Series SED1200 Series LCD Display Interface • 10 Characters on 1 line (1/8 duty) SEG 1 SEG 50 COM 1 COM 8 • 10 Characters on 2 lines (1/16 duty) COM 1 SEG 1 SEG 50 COM 8 COM 9 COM 16

EPSON 2–23 SED1200 Series SED1200 Series • Interface with Z-80A type CPU RD MREC AI WR Am Z-80A® SED1200 RESET An D0D1D2D3 RD WR CS A0 Clock DB0DB1DB2DB3 φ D R Q Q CK D R Q Q CK

2–24 EPSON SED1200 Series • Interface with 8085A type CPU RD IO/ M AI D R Q Q CK S1 S0 WR Am 8085A SED1200 An D0D1D2D3 CLK RESET OUT RD WR CS A0DB0DB1DB2DB3 φ D R Q Q CK

EPSON 2–25 SED1200 Series SED1200 Series APPENDIX A: CHARACTER CODES AND FONTS SED1200F 0A /SED1200D 0A Lower 4 bit (D 0 to D 3 ) of Character Code (Hexadecimal) Higher 4 bit (D 4 to D 7 ) of Character Code (Hexadecimal) 0 0 2 3 4 5 6 7 A B C D CGRAM AREA 5 x 8 DOTS 1 2 3 4 5 6 7 8 9 A B C D E F

EPSON 2–27 SED1200 Series SED1200 Series APPENDIX B: I/O TERMINAL STRUCTURE • Input Terminal (No pull-up) Terminals used: Φ , OSC1 V DD V SS V SS V DD • Input Terminal (No pull-up) Terminals used: D0 to D2 V DD V SS V SS V DD WR WR

2–28 EPSON SED1200 Series • Output Terminal (No pull-up) Terminals used: OSC2 V DD V DD V SS V SS • Input Terminal (Pull-up) Terminals used: CS, RD, WR, A0 V DD V SS V SS V SS V DD V DD

EPSON 3–3 SED1210 SED1210 TABLE 1. SED1210F Pinout No. NAME 1 SEG17 2 SEG16 3 SEG15 4 SEG14 5 SEG13 6 SEG12 7 SEG11 8 SEG10 9 SEG9 10 SEG8 11 SEG7 12 SEG6 13 SEG5 14 SEG4 15 SEG3 16 SEG2 17 SEG1 18 COM1 19 COM2 20 COM3 No. NAME 21 COM4 22 COM5 23 COM6 24 COM7 25 COM8 26 A0 27 CS 28 RD 29 WR 30 Φ 31 ...

3–4 EPSON SED1210 PIN DESCRIPTION CPU Interface CS Active low chip select input. RD Active low read enable input. WR Active low write strobe. A0 Selects between instruction and displaydata access.A0 = H: Display dataA0 = L: Instruction DB0–DB6 Active high CPU data inputs. DB7 Active high CPU data in...

EPSON 3–9 SED1210 SED1210 AC Characteristics MPU Read Timing A0 t AR t CR t RP t RC t RA t RD t RH 2.0V 0.8V 2.4V0.4V t f t r CS RD Busy flag DB7 Input signal ( A0 , CS , RD ) V DD = 5 V, Ta = –20 to 70 ° C. Note: Load on pin DB7 is C L = 100 pF. Parameter Symbol Rating Unit min typ max Setup time f...

3–12 EPSON SED1210 X-driver Control Timing FR LP SO XSCL t WHLP t DFR t WLLP t LT t LH t CCL t DSO t WHCL t WLCL V DD = 2.5 to 5.5 V, Ta = –20 to 70 ° C. Note: Load capacitance C L = 15 pF Parameter Symbol Rating Unit min typ max Shift clock cycle t CCL 3.3 10 — µ s Shift clock “H” pulsewidth t WHCL...

3–14 EPSON SED1210 OPERATION Data Input/Output New commands must not be written to the SED1210F ifit is currently executing the last one, so the busy flagshould be checked before commands are written.If the busy flag is not going to be checked between writesof individual commands then the MPU must w...

EPSON 3–15 SED1210 SED1210 Loading CGRAM The character generator RAM is loaded with a characterbit pattern using a combination of one SET CGRAMADDRESS command and eight SET CGRAM DATAcommands. For example, to load the character shown infigure 2 into the area of CGRAM corresponding tocharacter code 0...

3–16 EPSON SED1210 APPLICATION NOTES Display Oscillator The SED1210F has an internal oscillator to generate thetiming signals required for the LCD display.If the internal oscillator is used, connect the feedbackresistor R f as shown in figure 3. The feedback resistor leads must be kept as short as p...

EPSON 3–17 SED1210 SED1210 Command Clock ( Φ ) When the system MPU issues a command to theSED1210F, the timing for the execution of the commandis derived from Φ , the command clock. This would normally be the system MPU clock.The maximum execution time for a command is given by16/ Φ . For example if...

3–18 EPSON SED1210 Examples of drive waveforms are shown below. • LCD Drive Waveform – 1 Line Display (1/8 Duty Cycle) COM 1 2345678 SEG1 4/4(V DD— V LCD ) 3/4 "2/4 "1/4 "0-1/4 "-2/4 "-3/4 "-4/4 " 4/4(V DD— V LCD ) 3/4 "2/4 "1/4 "0-1/4 "-2/4 "-3/4 "...

3–20 EPSON SED1210 LCD Display Interface • 8 Characters/2 line GND CLOCK DB0 to DB6 Rf COM16 40 16 COM1 OSC1 OSC2 SO SHCL LP FR V L2 V L3 ø DB0-6 DB7 A0 CS WR RD V LCD V SS V DD SEG1 SEG40 8 bit CPU SED 1210F LCD V DD • 20 Characters/2 lines GND CLOCK DB0 -DB6 R f COM16 S0 D0 60 40 16 DO0 XSCLLPFRV2...

EPSON 3–21 SED1210 SED1210 • Interface with 8-bit CPU IORQ A0 SED1210F Chip Selector CS DB0toDB6 D0 to D6 DB7 A0 A1 to A7 Z80 D7 RD WR RD WR R Z80 is a registered trademark of Zilog Corporation.

3–24 EPSON SED1210 APPENDIX B: I/O TERMINAL STRUCTURE I/O Terminal Structure Input • Input Terminal (No pull-up) Terminals used: Φ , OSC1 V DD V SS V SS V DD • Input Terminal (No pull-up) Terminals used: DB0 to DB6 V DD V SS V SS V DD WR WR • Input Terminal (Pull-up) Terminals used: CS, RD, WR, A0 V...

EPSON 3–25 SED1210 SED1210 • I/O Terminal (No pull-up) Terminals used: DB7 V DD V DD V DD V SS V SS V SS RD Busy Flug WR WR • Output Terminal (No pull-up) Terminals used: OSC2, SO, SHCL, LP, FR V DD V DD V SS V SS • LCD Drive Terminal (No pull-up) Terminals used: SEG1 to SEG40, COM1 to COM16 V DD V ...

EPSON 4–1 SED1220 SED1220 • Built-in CR oscillation circuit (C and R contained)• Accepts external clock input• High-speed MPU interface Affords interface with both 68/80 system MPUsAffords interface through 4 bits and 8 bits • Affords serial interface• Character font consists of 5 × 8 dots • Duty ra...

EPSON 4–3 SED1220 SED1220 CHIP SPECIFICATION SED1220D**/1221D**/122AD** SED122 * D ** Digits prepared for CGROM pattern changes Chip size: 7.70 × 2.77 mm Pad pitch: 100 µ m (Minimum) Chip thickness (for reference): 625 ± 25 µ m (SED122 * D *A ) (SED122 * D *B ) 1) A1 pad specifications Pad size on Y...

4–4 EPSON SED1220 SED1222D** SED1222D ** Digits prepared for CGROM pattern changes Chip size: 7.70 × 2.77 mm Pad pitch: 124 µ m (Minimum) Chip thickness (for reference): 625 ± 50 µ m (SED1222D *A ) 1) A1 pad specifications Pad size on Y side: 90 µ m × 96 µ m Pad size on X side: 96 µ m × 90 µ m (PAD....

4–6 EPSON SED1220 109 SEG31 119 1204 110 SEG32 19 111 SEG33 –81 112 SEG34 –181 113 SEG35 –281 114 SEG36 –381 115 SEG37 –481 116 SEG38 –581 117 SEG39 –681 118 SEG40 –781 119 SEG41 –881 120 SEG42 –981 121 SEG43 –1081 122 SEG44 –1181 123 SEG45 –1281 124 SEG46 –1381 125 SEG47 –1481 126 SEG48 –1581 127 S...

4–8 EPSON SED1220 PAD COORDINATES No. Name X Y 109 SEG58 –3694 1191 110 SEG59 1067 111 SEG60 943 112 COM16 819 113 COM15 695 114 COM14 571 115 COM13 447 116 COM12 323 117 COM11 119 118 COM10 75 119 COM9 –49 120 COMS2 –173 121 SEGSA –335 122 SEGSB –459 123 SEGSC –583 124 SEGSD –707 125 SEGSE –3694 –8...

EPSON 4–11 SED1220 SED1220 DESCRIPTION OF PINS Power Pins LCD Power Circuit Pins Pin name I/O Description Q’ty V DD Power supply Connected to logic supply. Common with MPU power terminal V CC . 1 V SS Power supply 0V power terminal connected to system ground. 1 V 0 , V 1 Power supply Multi-level pow...

4–12 EPSON SED1220 Pin name I/O Description Q’ty D7 (SI) I 8-bit input data bus. These pins are connected to a 8-bit or 16-bit 8 D6 (SCL) standard MPU data bus. D5 ~ D0 When P/S = “Low”, the D7 and D6 pins are operated as a serial datainput and a serial clock input respectively. A0 I Usually, this p...

4–14 EPSON SED1220 FUNCTIONAL DESCRIPTION MPU Interface Selection of interface type In the SED1220 Series, data transfer is performed through a 8-bit or 4-bit data bus or a serial data input (SI). By selecting“High” or “Low” as P/S pin polarity, a parallel data input or a serial data input can be se...

EPSON 4–15 SED1220 SED1220 Fig. 1 Identification of data bus signals The SED1220 series identifies data bus signals, as shown in Table 3, by combinations of A0 and WR (E). Table 3 Chip select The SED1220 series has a chip select pin (CS). Only when CS = “Low”, MPU interfacing is enabled.In any statu...

4–16 EPSON SED1220 Voltage Tripler Circuit If capacitors are connected between CAP+1 – CAP–1and CAP2+,CAP2– and V SS V OUT , V DD – V SS potential is negatively tripled and generated at V OUT terminal. When the voltage is boosted double, open CAP2+ and connect CAP2– to V OUT terminal. At this time, ...

SED1220 EPSON 4–17 SED1220 ● Voltage Regulation Circuit Using Electronic VolumeFunction The electronic volume function allows to control theliquid crystal drive voltage V 5 with the commands and thus to adjust density of the liquid crystal display.Liquid crystal drive voltage V 5 can have one of 32 ...

4–18 EPSON SED1220 Liquid crystal voltage generating circuit V 5 potential is resistive divided within IC to produce V 1 , V 2 , V 3 and V 4 potentials required for driving the liquid crystal. V 1 , V 2 , V 3 and V 4 potentials are then subject to impedance conversion and provided to the liquid crys...

4–20 EPSON SED1220 Low Power Consumption Mode SED1220 is provided with standby mode and sleep modefor saving power consumption during standby period. ● Standby Mode Switching between on and off of the standby mode isdone using the power save command.In the standby mode, only static icon is displayed...

SED1220 EPSON 4–21 SED1220 The cursor position indicates the position of addresscounter. Therefore, whenever moving the cursor, changethe address counter value using the RAM addressset command or the auto increment done by writingthe RAM data. ISelective flashing symbol display is possible byselecti...

4–22 EPSON SED1220 VF = 0 : Voltage follower off 1 : Voltage follower on VC = 0 : Voltage regulation circuit off 1 : Voltage regulation circuit on (5) System SetThis command is used for selecting display line,common shift direction and use/non-use of CRRAM.When power on or resetting is done, execute...

SED1220 EPSON 4–23 SED1220 (7) Data Write 1 This command writes data the DD RAM, CG RAMor symbol register. 2 This command automatically increases the addresscounter by +1, thus enabling continuous writing ofdata. <Example of Data Writing> Following figures illustrates an example of con-tinuous...

4–24 EPSON SED1220 Table 4 SED1220 Series Command List Command Code Function A0 WR D7 D6 D5 D4 D3 D2 D1 D0 (1) Cursor Home 0 0 0 0 0 1 * * * * Moves the cursor to the home position. (2) Display ON/OFF 0 0 0 0 1 1 C B * D Sets cursor ON/OFF (C), cursor blink ON//OFF (B), Control and display ON/OFF (D...

4–30 EPSON SED1220 up to 5 icons (SED1220/1221/1222) or 10 icons(SED122A).Following shows relationship between the static iconsfunctions, static icon RAM addresses and written data. Electronic Volume RAM (register) SED1220 contains the electronic volume function forcontrolling the liquid crystal dri...

SED1220 EPSON 4–31 SED1220 ABSOLUTE MAXIMUM RATINGS Notes: 1. All the voltage values are based on V DD = 0 V. 2. For voltages of V 1 , V 2 , V 3 and V 4 , keep the condition of V DD ≥ V 1 ≥ V 2 ≥ V 3 ≥ V 4 ≥ V 5 and V DD ≥ V SS ≥ V 5 ≥ V OUT at all times. 3. If the LSI is used exceeding the absolute...

4–32 EPSON SED1220 DC CHARACTERISTICS V DD = 0 V, V SS = –3.6 V to –2.4 V, Ta = –30 to 85 ° C unless otherwise specified. Item Symbol Condition min typ max Unit Applicable pin Power Operatable V SS –3.6 –3.0 –2.4 V V SS supply Data retain –3.6 –2.0 *1 voltage (1) voltagePower Operatable V 5 –7.0 –4....

4–34 EPSON SED1220 TIMING CHARACTERISTICS (1) MPU Bus Write Timing (80 series) A0 WR D0 to D7 t AH8 t cyc8 t AC8 t AW8 t CCL t CCH t DS8 t DH8 CS Item Signal Symbol Measuring Min. Max. Unit condition Address hold time A0, CS t AH8 Every timing is specified 30 – ns Address setup time t AW8 on the bas...

SED1220 EPSON 4–35 SED1220 (2) MPU Bus Write Timing (68 series) Item Signal Symbol Measuring Min. Max. Unit condition Address setup time A0, CS t AW6 Every timing is specified 60 – ns Address hold time t AH6 on the basis of 20% and 30 – ns CS setup time t AC6 80% of V SS . 0 – ns System cycle time W...

4–36 EPSON SED1220 (3) Serial Interface t CSS t CSH t SAS t SAH t SLW t SCYC t SHW t SDS t SDH CS A0 SCL SI *1: For the rise and fall of an input signal (t r and t f ), set a value not exceeding 25ns (excluding RES input). V SS × 0.8 [V] V SS × 0.2 [V] t r t f Item Signal Symbol Measuring Min. Max. ...

4–38 EPSON SED1220 INTERFACE TO LCD CELLS (REFERENCE) 12 columns by 3 lines, 5 × 8-dot matrix segments and symbols 1 12 SED 1220 LCD panel static icon symbol character signal signal COMS1 COMSA SEGSA SEGSE COMS2 COM1 2 34567 8 COM17 SEGS2 SEGS1 SEG60 SEGS5 SEGS4 SEG1 2345 18 192021222324 COM9 10 111...

4–42 EPSON SED1220 LIQUID CRYSTAL DRIVE WAVEFORMS (B WAVEFORMS) COM 1 COM 2 COM 3 COM 4 COM 5 COM 6 COM 7 COM 8 COM 9 COM 10 COM 11 COM 12 COM 13 COM 14 COM 15 COM 16 SEG 1 SEG 5 SEG 2 SEG 3 SEG 4 COMO -SEG 2 V 5 V 4 V 3 V 2 V 1 V DD V 5 V 4 V 3 V 2 V 1 V DD V 5 V 4 V 3 V 2 V 1 V DD V 5 V 4 V 3 V 2 ...

SED1220 EPSON 4–43 SED1220 Instruction Setup Example(Reference Only) (1) Initial setup V DD -V SS power ON Power regulation Input of reset signal Waiting for 10 sec or more Waiting for 20msec or more 2) End of initialization Command status• Static display control: Off• Display on/off control: Off• P...

SED1220 EPSON 4–45 SED1220 Instruction Setup Example of SED1220 series (1) Initial setup(2) display ON “EPSON”(3) Display ON the Icon(4) Standby Mode sequence(5) Releasing the Standby Mode sequence <Diagram of SED1220Txx and LCD Panel> Static Icon SED1220D AB CHIP:REVERSE 80series MPU V DD RES...

EPSON 5–1 SED1225 Series SED1225 Series OUTLINE The SED1225 dot-matrix LCD Controller Driver receives4-bit, 8-bit, or serial data from the microprocessor anddisplays up to 36 characters, four user-defined characters,and up to 120 symbols.Up to 256 types of built-in character generator ROMs areprovid...

EPSON 5–3 SED1225 Series SED1225 Series PIN ASSIGNMENT SED1225D ✽✽ ↑ CGROM pattern version number Chip size: 7.85 × 1.97 mm Pad pitch: 90 µ m (min) Chip thickness (Reference): 625 µ m Au bump specifications Bump size: Pad Nos. 59 to 72, and 155 to 171: 78 µ m × 59 µ m Pad Nos. 1 to 58, and 73 to 154...

5–6 EPSON SED1225 Series PIN DESCRIPTION Power Supply Pins Notes: Two V SS pins are provided. As they are commonly connected inside the IC, an input into any V SS can be used if power impedance is low. To have the enough noise resistance, however, the V SS power input from each pin is recommended. L...

EPSON 5–7 SED1225 Series SED1225 Series System Bus Connector Pins Pin Name I/O Descrition No. of Pins An 8-bit input data bus to be connected to the standard 8- or 16-bit MPU data bus.Pins D7 and D6 function as the serial data and clock inputs respectively if PS islogical low. D7(SI) D6(SCL) I 8 D5 ...

EPSON 5–9 SED1225 Series SED1225 Series FUNCTION DESCRIPTION MPU Interfaces Interface type selection The SED1225 can transfer data via the 4- or 8-bit data busor via the serial data input (SI). The parallel or serial datainput can be selected by setting the PS pin to high or low(see Table 1). The SE...

5–10 EPSON SED1225 Series Figure 1 Data bus signal identification The SED1225 identifies the data bus based on acombination of A0, AWR and E signals as defined onTable 3. Table 3 Chip Select The SED1225 has an Chip Select pin (XCS) to allow anMPU interface input only if XCS=low.During no chip select...

EPSON 5–11 SED1225 Series SED1225 Series Voltage regulator • Voltage regulator using the electronic control functionUse the electronic control function and set the voltagesappropriate to the LCD panel driving.When a 5-bit data is set in the electronic controlregister, one of 32-state voltages can be...

EPSON 5–13 SED1225 Series SED1225 Series The following provides the relationship between the Cand B registers and cursor display. (C, B) = (0, 0) (1, 0) (1, 1) f BLNK The cursor display position is indicated by the addresscounter. Accordingly, to move the cursor, change theaddress counter value by a...

5–14 EPSON SED1225 Series The character on the 3rd line will be displayed indouble size on the second and third lines bysetting DC=1. (2) N=1 (1/18 duty) . . . . . . . . . DC=0 DC=1 1st column 1st column 12th column 12th column COM1– 1st line 2nd line COM16– The character on the 1st line will be dis...

EPSON 5–15 SED1225 Series SED1225 Series (4) Horizontal vertical flipping . . . . . . . . COM1 COM16 (N=1)COM24 (N=0) SEG1 SEG60 (6) RAM Address Setup The RAM Address Setup command sets an addressinto the Address counter to write data intoDDRAM, CGRAM and Symbol register.When the cursor display is O...

EPSON 5–17 SED1225 Series SED1225 Series BUILT-IN MEMORIES Character Generator ROM (CGROM) The SED1225 contains up to 126 types of CGROMs.Each character has a 5 × 8-dot structure. Tables 5 to 8 defines the SED1225D ✽✽ character codes. Four characters (00H to 03H) of character codes are usedfor the C...

EPSON 5–21 SED1225 Series SED1225 Series Character Generator RAM (CGRAM) The SED1225 has a built-in CGRAM to program user-defined character patterns for highly flexible signal andcharacter display.Issue the System Setup command to use the CGRAM.The CGRAM has the 160-bit storage capacity, and it can ...

5–22 EPSON SED1225 Series Symbol Register The SED1225 has a built-in Symbol register to allowseparate symbol setup on the display panel.The Symbol register has the 120-bit storage capacity, andit can display 120 symbols. Also, the SED1225 containsa Blink register for every 5-dot blinking. The follow...

EPSON 5–23 SED1225 Series SED1225 Series Static Icon RAM The SED1225 has a built-in Static Icon RAM to displaya static icon separately from the dynamic icon.The Static Icon RAM has the 20-bit storage capacity, and it can display 10 icons. The following provides therelationship between the static ico...

EPSON 5–25 SED1225 Series SED1225 Series MAXIMUM ABSOLUTE RATINGS Notes: 1. All voltages are referenced to V DD =0 V. 2. The following voltage levels must always be satisfied: V DD ≥ V 1 ≥ V 2 ≥ V 3 ≥ V 4 , and V DD ≥ V SS ≥ V 5 3. If the LSI is used beyond the maximum absolute rating, the LSI may b...

EPSON 5–27 SED1225 Series SED1225 Series *1 Although the wide operating character range is guaranteed, a quick and excessive voltage variation may not be guaranteed during access by the MPU. The low-voltage data hold characteristics are valid during Sleep mode. Noaccess by the MPU is allowed during ...

5–28 EPSON SED1225 Series SIGNAL TIMING CHARACTERISTICS (1) MPU bus write timing (80 series) *1 The input signal rise and fall times ( t r, t f) are defined to be 25 nsec max (except for RES input). *2 “ t CCL ” is defined by the overlap time of XCS low level and XWR low level. A0 XWR D0 to D7 t AH8...

5–32 EPSON SED1225 Series 1 12 columns SED 1225 LCD panel Static Icon Symbols Symbols Character Signals Signals COMS1 COMSA SEGSA SEGSJ COMS2 COM1 2 34567 8 COM17 SEGS2 SEGS1 SEG60 SEGS5 SEGS4 SEG1 2345 18 192021222324 COM9 10 111213141516 . . . . . . . . . . . . . . . . . . . ... LCD CELL INTERFACE...

EPSON 5–35 SED1225 Series SED1225 Series VDD-VSS power on Power stable Reset input Wait for 10 microseconds or more. End of initialization Wait for 20 microseconds or more. Command status- Static display control- Display on/off control- Power save- Power supply control- System setup - Electronic vol...

5–36 EPSON SED1225 Series Display Mode End of initialization RAM address set input RAM (data) write input Display the written contents. Standby Mode (1) Setting the standby mode <1> Display on/off control command input<2> Power save command input <3> Power supply control command in...

EPSON 5–37 SED1225 Series SED1225 Series Sleep Mode (1) Setting the Sleep mode. End of initialization Starts the sleep mode. Normal operation (Power save is cleared and oscillating circuit turns on.) <1> Display on/off control command input<2> Power save icon control <3> Power save...

5–38 EPSON SED1225 Series OPTION LIST The SED 1225 has the following options. Options areavailable exclusively for users. Please contact our SalesDepartment for information.• The following shows how to define the name of theproduct compatible with options: Example: SED1225D *B ↑ Option compatibility...

EPSON 5–39 SED1225 Series SED1225 Series CAUTIONS The following points should be noted when this Development Specification is used:1. This Development Specification is subject to modification for improvement without prior notice.2. This Development Specification is not intended to guarantee enforcem...

SED1230 Series EPSON 6–3 SED1230 Series SED1230 SERIES, CHIP SPECIFICATION SED1230D ** 1/30 duty 12 columns + 1 signal column SED1231D ** 1/23 duty 12 columns + 1 signal column SED1232D ** 1/16 duty 12 columns + 1 signal column SED1233D ** 1/16 duty 16 columns #1 Column for CG ROM pattern change Chi...

6–4 EPSON SED1230 Series PAD COORDINATES No. Name X Y <SED1230D**> Unit: µ m 1 (NC) –4793 –1371 2 –4683 3 –4572 4 –4462 5 V DD –4242 6 –4132 7 –4021 8 –3911 9 V SS –3691 10 –3581 11 –3470 12 –3360 13 V 5 –3140 14 –3030 15 –2919 16 –2809 17 V 4 –2589 18 –2479 19 –2368 20 –2258 21 V 3 –2021 22 –...

6–14 EPSON SED1230 Series Pin name I/O Description Q’ty COM1~ O Common signal output pin (for characters) 28 COM28 Common signal output pin (except for characters) COMS1~ O CMOS1: Common output for static drive. In the standby mode 3 CMOS3 only, a V SS amplitude is output. CMOS2, CMOS3: Common outpu...

6–16 EPSON SED1230 Series Boosting Voltage regulat- Voltage External Boosting circuit ing circuit follower voltage input system pin ● ● ● ● ● ● — × ● ● ● ● V OUT OPEN × × ● ● V 5 = V OUT OPEN × × × V 1 , V 2 , V 3 , V 4 , V 5 OPEN Note 1Note 2Note 3 SCL 1 A0 S1 CS D7 D6 D5 D4 D3 D2 D1 D0 D7 2 3 4 5 ...

SED1230 Series EPSON 6–17 SED1230 Series Triple boosting circuit When a capacitor is connected between CAP1+ andCAP1-, between CAP2+ and CAP2-, and between V SS pin and V OUT pin respectively, the potential between the V DD pin and V SS pin is boosted triple and output to the V OUT pin. In case of d...

SED1230 Series EPSON 6–19 SED1230 Series When a built-in power supply is used Under a triple boosting The diagram under a double boosting When an external power regulator is used (The built-in power regulator is not used) Liquid crystal voltage generating circuit The V 5 potential is resistance-divi...

SED1230 Series EPSON 6–21 SED1230 Series COMMANDS Table 4 shows a command list. In the SED1230 Series,each data bus signal is identified by a combination of A0and WR (E).Command interpretation and execution are performed byonly internal timing. This permits high-speed process-ing. • Outline of Comma...

SED1230 Series EPSON 6–23 SED1230 Series RAM Map (SED1230, SED1231, SED1232) 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 H C G R A M ( 0 0 H ) – C G R A M ( 0 1 H ) – 1 0 H C G R A M ( 0 2 H ) – C G R A M ( 0 3 H ) – 2 0 H Unused 3 0 H DDRAM line 1 Unused 4 0 H DDRAM line 2 For signals " 5 0 H DDRAM lin...

6–24 EPSON SED1230 Series Table 4 SED1230 Series Command List Command Code Function A0 WR D7 D6 D5 D4 D3 D2 D1 D0 (1) Cursor Home 0 0 0 0 0 1 * * * * Moves the cursor to the home position. (2) Static Display 0 0 0 0 1 0 * * SD1 Sets the display mode of static display symbol Control SD0 SD1, SD0 = 0,...

6–26 EPSON SED1230 Series SED123 * D A * Table 5 Lower 4 Bit of Code 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 1 2 3 4 5 6 7 8 9 A B C D E F Higher 4 Bit of Cord

SED1230 Series EPSON 6–29 SED1230 Series Character Generator RAM (CG RAM) The SED1230 Series is provided with a CG RAM that permits user-programming character patterns so that they can bedisplayed with a high degree of freedom for signal display. Before using the CG RAM, select the use of CG RAM by ...

6–30 EPSON SED1230 Series Symbol Register The SED1230 Series is provided with a symbol register that permits displaying each symbol so that symbol display maybe performed on the screen.The capacity of the symbol register is 64 bits. In case of 12 digits, 48 symbols can be displayed. In case of 16 di...

SED1230 Series EPSON 6–35 SED1230 Series TIMING CHARACTERISTICS (1) System Bus Write Characteristic I (80 series MPU) *1: For the rise and fall of an input signal, set a value not exceeding 25 ns.*2: Every timing is specified on the basis of 20% and 80% of V SS . *3: For A0 and CS, the same time is ...

6–36 EPSON SED1230 Series (2) System Bus Write Characteristic II (68 series MPU) *1: t CYC6 denotes the cycle of the E signal in the CS active state. t CYC6 must be reserved after CS becomes active. *2: For the rise and fall of an input signal, set a value not exceeding 25 ns.*3: Every timing is spe...

SED1230 Series EPSON 6–39 SED1230 Series INTERFACE TO LCD CELLS (REFERENCE) 12 columns by 2 lines, 5 × 7-dot matrix segments and symbols ■ System Setup N2 N1 0 0 SED1232 1 • • • • • • • • • • • • • • 12 COMS1 SEGS1 COMS2 COMS3 COM1 234567 COM8 9 1011121314 SEGS2 34 SEG1 2345 : : SEG60 SEGS4 56

SED1230 Series EPSON 6–41 SED1230 Series Instruction Setup Example (Reference Only) (1) Initial setup V DD -V SS power ON Power regulation Input of reset signal Command status• Static display control : Off • Display on/off control : Off• Power save : Off • Power control : Off • System reset : CG=0 •...

EPSON 7–3 SED1234/35 Series SED1234/35 Series SED1234/35 SERIES, CHIP SPECIFICATION SED1234D ** 1/30 duty SED1235D ** 1/16 duty #1 Column for CG ROM pattern change Chip size: 10.23 × 3.11 mm Pad pitch: 126 µ m (Min.) Chip thickness: 625 ± 25 µ m (SED123 * D *A ) 525 ± 25 µ m (SED123 * D *C ) 1) A1 p...

EPSON 7–13 SED1234/35 Series SED1234/35 Series Triple boosting circuit When a capacitor is connected between CAP1+ andCAP1-, between CAP2+ and CAP2-, and between V SS pin and V OUT pin respectively, the potential between the V DD pin and V SS pin is boosted triple and output to the V OUT pin. In cas...

EPSON 7–15 SED1234/35 Series SED1234/35 Series Liquid crystal voltage generating circuit The V 5 potential is resistance-divided inside the IC so that V 1 , V 2 , V 3 and V 4 potentials are generated for liquid crystal drive.Furthermore, the V 1 , V 2 , V 3 and V 4 are impedance- converted by voltag...

EPSON 7–17 SED1234/35 Series SED1234/35 Series COMMANDS Table 4 shows a command list. In the SED1230 Series,each data bus signal is identified by a combination of A0and WR (E). Command interpretation and execution are performed byonly internal timing. This permits high-speed process-ing. • Outline o...

7–18 EPSON SED1234/35 Series thereby adjusting the gradation of liquid crystaldisplay.When data is set in the 4-bit register, the liquidcrystal driving voltage can take one of 16 voltagestates. When the electronic volume function is not used,set (A3, A2, A1, A0) = (0, 0, 0, 0). (7) RAM Address SetTh...

EPSON 7–27 SED1234/35 Series SED1234/35 Series ABSOLUTE MAXIMUM RATINGS Item Symbol Standard value Unit Power supply voltage (1) V SS –6.0~+0.3 V Power supply voltage (2) V 5 –16.0~+0.3 V Power supply voltage (3) V 1 , V 2 , V 3 , V 4 V 5 ~+0.3 V Input voltage V IN V SS –0.3~+0.3 V Output voltage V ...

EPSON 8–3 SED1240 Series SED1240 Series CHIP SPECIFICATIONS SED124 ** ** Digits for CGROM pattern changeNumber of display lines 0: 4-line display 1: 3-line display 2: 2-line display Chip size: 8.70 × 2.80 mm Pad pitch: 90 µ m (Min.) Chip thickness (reference value): 625 ± 50 µ m (SED124 * D ** ) Au ...

EPSON 8–5 SED1240 Series SED1240 Series 109 SEG7 [A TYPE] 3009 1240 110 SEG8 [A TYPE] 2919 111 SEG9 [A TYPE] 2830 112 SEG10 [A TYPE] 2740 113 SEG11 [A TYPE] 2650 114 SEG12 [A TYPE] 2561 115 SEG13 [A TYPE] 2471 116 SEG14 [A TYPE] 2381 117 SEG15 [A TYPE] 2291 118 SEG16 [A TYPE] 2202 119 SEG17 [A TYPE]...

EPSON 8–7 SED1240 Series SED1240 Series 109 SEG7 [A TYPE] 3009 1240 110 SEG8 [A TYPE] 2919 111 SEG9 [A TYPE] 2830 112 SEG10 [A TYPE] 2740 113 SEG11 [A TYPE] 2650 114 SEG12 [A TYPE] 2561 115 SEG13 [A TYPE] 2471 116 SEG14 [A TYPE] 2381 117 SEG15 [A TYPE] 2291 118 SEG16 [A TYPE] 2202 119 SEG17 [A TYPE]...

EPSON 8–11 SED1240 Series SED1240 Series System Bus Connecting Pins Pin name I/O Description Q’ty D7 (SI) I 8-bit input data bus which is connected to the 16-bit standard MPU 8 D6 (SCL) data bus. D5 to D0 Pin D7 and pin D6 function as a serial data input and a serial clockinput at P/S = “L”, respect...

EPSON 8–13 SED1240 Series SED1240 Series DESCRIPTION OF FUNCTIONS MPU Interfaces In the SED1240 series, an MPU type, interface bit length and interface method can be selected depending on pins IF, P/S and C86. Selection of MPU In the SED1240 series, when parallel input is selected (P/S = “H”), pin C...

EPSON 8–15 SED1240 Series SED1240 Series Boosting circuit The SED1240 series is provided with a boosting circuitfor triple boosting and double boosting for the potentialbetween V DD and V SS2 . For triple boosting, connect a capacitor between CAP1+and CAP1–, between CAP2+ and CAP2–, and betweenV DD ...

8–16 EPSON SED1240 Series Voltage regulating circuit The boosting voltage generated at V OUT is output as a liquid crystal drive voltage of V 5 through the voltage regulating circuit.The SED1240 series is provided with a high-precisionconstant-voltage source, a 32-step electronic volumefunction, and...

EPSON 8–17 SED1240 Series SED1240 Series [When using the V 5 voltage regulating built-in resistor (Use of V 5 voltage regulating built-in resistor is set by command.)] When the V 5 voltage regulating built-in resistor and the electronic volume function are used, the liquid crystal supply voltage V 5...

8–18 EPSON SED1240 Series • Voltage regulating circuit using the electronic volume functionWhen the electronic volume function is used, theliquid crystal drive voltage V 5 can be controlled by the command to adjust the density of liquid crystal display.Regarding this method, set 5-bit data in the el...

EPSON 8–21 SED1240 Series SED1240 Series High power mode The power circuit built-in the SED1240 series is a lowpower consumption type. (when the high power mode isOFF)Accordingly, in the case of a large load liquid crystal orpanel, the display quality may be degraded. In this case,the display qualit...

8–22 EPSON SED1240 Series pulses at least for 10 µ s as described in DC Characteristics. The ordinary operation will be started in 1 µ s or more after the rising edge of the RES signal. When the RES pinbecomes active, each register will be cleared and set tothe above setup status.If initialization i...

EPSON 8–25 SED1240 Series SED1240 Series Command Code Function RE A0 WR D7 D6 D5 D4 D3 D2 D1 D0 (8) RAM 0/1 1 0 DATA Writes data into the DDRAM, CGRAM, symbol Data register RAM, static icon RAM or electronic volume Write RAM.This is determined by the address set instructionexecuted immediately befor...

8–26 EPSON SED1240 Series • When 2-line scroll has been performed upward at the 4-line display 31H 30H 33H 32H 35H 34H 36H 38H 37H 3AH 39H 3CH 3BH 3EH 3FH 3DH 41H 40H 43H 42H 45H 44H 46H 48H 47H 4AH 49H 4CH 4BH 4EH 4FH 4DH 51H 50H 53H 52H 55H 54H 56H 58H 57H 5AH 59H 5CH 5BH 5EH 5FH 5DH 61H 60H 63H 6...

EPSON 8–27 SED1240 Series SED1240 Series • When 2-line scroll has been performed upward at the 2-line display [(LS1, LS2) = (1, 0)] 31H 30H 33H 32H 35H 34H 36H 38H 37H 3AH 39H 3CH 3BH 3EH 3FH 3DH 41H 40H 43H 42H 45H 44H 46H 48H 47H 4AH 49H 4CH 4BH 4EH 4FH 4DH 51H 50H 53H 52H 55H 54H 56H 58H 57H 5AH ...

8–28 EPSON SED1240 Series Vertical double-size display control Function: Displays the specified line in vertical double- size form.The specified line corresponds to the addressof the DDRAM.(Not the display line) • Displays the specified line of the DDRAM in vertical double-size form by setting DD4 t...

EPSON 8–29 SED1240 Series SED1240 Series • Example of vertical double-size display An example of 4-line display will be cited for explanation. 30H • • • • • • 3FH 40H • • • • • • 4FH 50H • • • • • • 5FH 60H • • • • • • 6FH 70H • • • • • • 7FH • • • • • • • : XXH 30H • • • • • • 3FH 40H • • • • • • 4...

EPSON 8–31 SED1240 Series SED1240 Series Display ON/OFF control Function: Sets both display and cursor ON/OFF, and extended register access. • Display ON/OFF is specified by setting D. D = 0 : Display ON D = 1 : Display ON • Character blink ON/OFF at the cursor position is specified by setting B. Ho...

8–32 EPSON SED1240 Series Power control (1) Function: Controls the operation of the built-in power circuit. • Boosting circuit ON/OFF is specified by setting P. For operating the boosting circuit, the oscillatingcircuit must be in operation. P = 0 : Boosting circuit OFF P = 1 : Boosting circuit ON •...

EPSON 8–33 SED1240 Series SED1240 Series • Example of display (compared by the same mounting method) RAM address set (1) [DDRAM, static iconRAM, electronic volume RAM] Function: Sets the address for writing data into the DDRAM, static icon RAM (including blinkcontrol), and electronic volume RAM in t...

8–36 EPSON SED1240 Series RAM data write Function: Writes data in the RAM areas of the DDRAM, CGRAM, symbol register RAM, static iconRAM, and electronic volume RAM.Before this command, be sure to execute theaddress set command.After that, each time data is written, theaddress will be automatically i...

8–38 EPSON SED1240 Series Lower 4 Bit of Code 0 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 A B C D E F 0 1 2 3 4 5 6 7 8 9 A B C D E F H i ghe r 4 B it o f C ode [SED1240D0A CGROM Font] Standard ROM Font

EPSON 8–47 SED1240 Series SED1240 Series Character Generator RAM (CGRAM) The SED1240 series is provided with a CGROM that permits the user to program character patterns so as to attain acharacter display with a high degree of freedom. When using the CGRAM, select Use of CGRAM by the system setcomman...

EPSON 8–51 SED1240 Series SED1240 Series Electronic Volume RAM The SED1240 series is provided with an electronicvolume function that permits controlling the liquid crystaldrive voltage V 5 and adjusting the density of liquid crystal display. The electronic volume function canselect one of 32 states ...

8–52 EPSON SED1240 Series ABSOLUTE MAXIMUM RATINGS Notes: 1. All the voltage values are based on V DD = 0 V. 2. The voltages of V 1 , V 2 , V 3 , and V 4 must always meet the condition of V DD ≥ V 1 ≥ V 2 ≥ V 3 ≥ V 4 ≥ V 5 and the condition of V DD ≥ V 5 ≥ V OUT, V DD ≥ (V SS , V SS2 ) ≥ V OUT . 3. ...

EPSON 8–53 SED1240 Series SED1240 Series DC CHARACTERISTICS [V SS = –5.5 V to –1.8 V, Ta = –30 to 85 ° C unless otherwise specified] Dynamic system Item Symbol Condition min typ max Unit Applicable pin Minimum reset pulse width t RW — 10 — — µ s *8 Reset start time t RES — — — 50 ns *8 Item Symbol C...

EPSON 8–55 SED1240 Series SED1240 Series t AH8 t CC t CYC8 t DS8 t DH8 A0, CS WR D0 to D7 t AH8 AC CHARACTERISTICS System Bus Write Characteristics I (80 series MPU) Item Signal Symbol Measuring Min. Max. Unit condition Address hold time A0, CS t AH8 – 30 – ns Address setup time t AW8 – 60 – ns Syst...

8–56 EPSON SED1240 Series E A0,CS D0 to D7 t CYC6 t EWL t AW6 t EWH t AH6 t DH6 t DS6 System Bus Write Characteristics II (68 series MPU) Item Signal Symbol Measuring Min. Max. Unit condition System cycle time A0, CS t CYC6 – 300 – ns Address setup time t AW6 60 – ns Address hold time t AH6 30 – ns ...

EPSON 8–57 SED1240 Series SED1240 Series t CSS t CSH t SAS t SAH t SLW t SCYC t SHW t SDS t SDH CS SCL A0 SI Serial Interface *1: For the rise and fall time of input signals, set 15 ns or less.*2: Every timing is specified on 20% and 80% of V SS . *3: To validate a command or data immediately before...

8–58 EPSON SED1240 Series MPU INTERFACE CONNECTION EXAMPLES (FOR REFERENCE) The SED1240 series can be connected to the 80 series MPU or 68 series MPU. Furthermore, it can be operated with lesssignal lines if the serial interface is used.When an MPU bus, port, etc. are put into high-impedance for a c...

8–60 EPSON SED1240 Series [16 digits × 3 line 5 × 8 dots] SED 1241 Symbol COMS1 COMSA SEGSA SEGSJ COMS2 COM1 2 34567 8 COM17 18 192021222324 SEG80 COM9 10 111213141516 Character LCD panel 1 16 columns • • • • • • • • • • • • SEG1SEG2 SEG3SEG4SEG5 • • • • •

8–62 EPSON SED1240 Series LIQUID CRYSTAL DRIVE WAVEFORM (B WAVEFORM) COM 1COM 2COM 3COM 4COM 5COM 6COM 7COM 8 COM 9 COM 10COM 11COM 12COM 13COM 14COM 15COM 16 SEG 1 SEG 5 SEG 2SEG 3SEG 4 COM1 - SEG 2 V 5 V 4 V 3 V 2 V 1 V DD V 5 V 4 V 3 V 2 V 1 V DD V 5 V 4 V 3 V 2 V 1 V DD V 5 V 4 V 3 V 2 V 1 V DD ...

EPSON 8–63 SED1240 Series SED1240 Series Example of Setting the Instructions(Reference) (1) Initialization This IC has no power-on reset function when poweris turned on. Accordingly, the IC internal status is indefinite when the power has been turned on. Besure to initialize the system. If electric ...

EPSON 8–65 SED1240 Series SED1240 Series OPTIONS LIST The SED 1240 series has the following options. Optionsare available exclusively for users. Please contact ourSales Department. ● ● The following shows how to define the name of theproduct compatible with options: (4) Power off sequence Similar to...

8–66 EPSON SED1240 Series Example of TCP Arrangement Note: The following does not specify the TCP externalview. SED1240TXX: COM1 to 16, (COM17 to 24) and [COM25 to 32] are used.SED1241TXX: COM1 to 16 and (COM17 to 24) are used. [COM25 to 32] is for NC.SED1242TXX: COM1 to 16 is used. (COM17 to 24) an...

EPSON 8–67 SED1240 Series SED1240 Series EXAMPLE OF TCP TCP External View REFERENCE Output terminal section pattern shape Specification: • Base Yurex 75 µ m • Copper foil electrolytic foil 25 µ m • Sn coating • Resist position tolerance ± 0.3 • Pitch 4IP (19mm) Note 1: The dimensions are measured af...

EPSON 9–1 SED1278 SED1278 FEATURES • Interface for 4- and 8-bit MPUs• Display RAM – 80 bytes (80 characters)• Character generator ROM – 240 characters – 5 × 8 pixel font • Character genrator RAM – 64 bytes – 5 × 8 pixel font, 8 characters. – 5 × 10 pixel font, 4 characters. • Number of characters us...

9–2 EPSON SED1278 BLOCK DIAGRAM DB 0toDB 7 E R/W RS V SS V DC V 1 V 2 V 3 V 4 V 5 COM 1 toCOM 16SEG 1 toSEG 40 XSCLLPFR DO OSC1 OSC2 8 5 5 5 7 7 I/O Buffer I/O Control Instruction Decoder Cursor/ Printer Control Instruction Register Daia Register M P X M P X M P X Character Generator RAM (CGRAM) 64 ...

EPSON 9–3 SED1278 SED1278 25 SED1278D 24 1 41 64 40 80 65 PINOUT Pin Number Name 1 SEG22 2 SEG21 3 SEG20 4 SEG19 5 SEG18 6 SEG17 7 SEG16 8 SEG15 9 SEG14 10 SEG13 11 SEG12 12 SEG11 13 SEG10 14 SEG9 15 SEG8 16 SEG7 17 SEG6 18 SEG5 19 SEG4 20 SEG3 Pin Number Name 21 SEG2 22 SEG1 23 GND 24 OSC1 25 OSC2 ...

9–4 EPSON SED1278 PIN DESCRIPTION MPU Interface RS Register select signal input. Selectsbetween the data and instruction registersduring CPU access.RS = 0: Instruction register access cycleRS = 1: Data register access cycle R/W This input selects between SED1278register read and write cycles.R/W = 0...

EPSON 9–5 SED1278 SED1278 TERMINAL CONFIGURATION 1. Input terminal configuration (1) V DD Internal Applicable terminal· E· OSCI V SS 2. Input terminal configuration (2)With pull-up MOS resistor V DD Applicable terminal· RS, R/W V SS Internal 3. Output terminal configuration V DD Applicable terminal·...

9–6 EPSON SED1278 4. Input/Output terminal configuration V DD Applicable terminal· DBO to DB7 Internal V SS INSTRUCTION DESCRIPTION Instruction Summary * Don’t care Instruction Code Description Cycle Time RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (max.) Clear Display 0 0 0 0 0 0 0 0 0 1 Clears all disp...

EPSON 9–7 SED1278 SED1278 Write Only Instructions Clear Display DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 1 01H RS = 0 This instruction1. loads all locations in the display data (DD) RAMwith 20H. 2. clears the contents of the address counter to 0H. 3. sets the display for zero character shift. 4...

9–8 EPSON SED1278 Set CGRAM Address DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 1 A CR 40H to 7FH RS = 0 This instruction1. loads a new 6-bit address into the address counter.2. sets the address counter to address CGRAM.Once “Set CGRAM Address” has been executed, thecontents of the address counter will be aut...

EPSON 9–9 SED1278 SED1278 Read Only Instructions Read Busy Flag/Address Counter DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 BF A CC RS = 1 Reading the instruction register yields the current valueof the address counter and the busy flag. This instructionmust be executed prior to any other instructions.• A CC , ...

9–10 EPSON SED1278 SPECIFICATIONS Absolute Maximum Ratings Notes: 1. V DD > V 1 > V 2 > V 3 > V 4 > V 5 > V SS 2. A flat package product can become less resistant to moisture if exposed to extreme temperatures. When mounting this package on a printed circuit board, use a soldering ...

EPSON 9–11 SED1278 SED1278 AC Characteristics • MPU write cycle timing (write to SED1278) R/W t AS t WEH t AH t AH V IL1 V IL1 V IH1 V IH1 tcyc E V IL1 t DS t DH t rE t FE V IL1 V IH1 RS E DB0 to DB7 Valid Data • MPU read cycle timing (read from SED1278) R/ W RS V IH1 V IH1 t WEH V IH1 V OH1 t cycE ...

9–12 EPSON SED1278 • External segment driver signal timing LP 0.9 V DD 0.1 V DD 0.1 V DD 0.9 V DD 0.1 V DD 0.9 V DD 0.9 V DD 0.9 V DD 0.1 V DD 0.9 V DD 0.1 V DD t WCLH t WCLH t WCLL t DSLP t DHX t OSX t DFR t DSLP 0.1 V DD XSCL DO FR (V DD = 5.0 V ± 10%, V SS = 0 V, Ta = –20 to 75 ° C) Parameter Sym...

EPSON 9–13 SED1278 SED1278 • Power-on reset timing 0.1ms ≤ tr ≤ 10ms (Ta = –20 to 75 deg. C) toff ≥ 1ms tr toff 0.2V 4.5V LCD Drive Voltages Mechanical Specifications SED1278F Package Dimensions 65 80 40 25 64 0.992 ± 0.016 (25.2 ± 0.4 ) 0.787 ± 0.004 (20.0 ± 0.1 ) 0.756 ± 0.016 (19.2 ± 0.4 ) 0.551 ...

9–14 EPSON SED1278 SED1278D Package Dimensions Chip size: 4.50 mm × 3.67 mm Chip thickness: 400 µ m Pad size: 109 µ m × 109 µ m Pad pitch: 182 µ m 25 Y X 24 1 41 64 40 80 65

9–16 EPSON SED1278 OPERATION The Busy Flag The SED1278 takes between 10 and 410 clock cycles toexecute instructions. During that period additionalinstructions should not be issued. The device is providedwith a busy flag to let the user check the internal state ofthe chip. BF should be 0 before anoth...

EPSON 9–17 SED1278 SED1278 Software initialization Initialization during power-on reset involves severalu n s t a b l e f a c t o r s r e l a t e d t o p o w e r - s u p p l y o u t p u tfluctuations. For this reason it is strongly recommendedthat a software initialization sequence is followed. • So...

EPSON 9–21 SED1278 SED1278 THE CHARACTER GENERATOR Character Generator ROM (CGROM) The SED1278 contains a 240 character, masked CGROM.Each character is 5 × 10 pixels, for 1/11 duty cycle compatibility. Refer to Appendix A for available codesand their corresponding fonts.Because the CGROM is masked, ...

9–22 EPSON SED1278 5 × 11 pixel font (1/11 duty cycle) The maximum character height is 11 pixels, however ifa cursor is used row 10 must be left blank.The SED1278 requires that, although the maximumcharacter height is 11 rows, each character is allocated 16rows (bytes) of address space. The last fiv...

EPSON 9–23 SED1278 SED1278 LCD INTERFACE LCD Drive Voltages The SED1278 generates segment and common drivesignals using the voltages supplied to pins V 1 , V 2 , V 3 , V 4 and V 5 . The voltage levels at these pins depend on the duty cycle of the display. The specifications of thesevoltages.The simp...

9–24 EPSON SED1278 LCD Drive Signal Waveforms The segment and common drive waveforms generatedby the SED1278, for various duty cycle ratios, are shownin figures 5, 6 and 7. FR t FR t FR V DD V SS V DD V 1 V 4 V 5 V DD V 1 V 4 V 5 V DD V 1 V 4 V 5 V DD V 2 , V 3 V 5 ........ ................ ...........

EPSON 9–25 SED1278 SED1278 FR t FR t FR V DD V SS V DD V 1 V 4 V 5 V DD V 1 V 4 V 5 V DD V 1 V 4 V 5 V DD V 5 , V 3 V 5 COM 1 COM 2 COM 16 SEG 1 ........ ................ ................ ................ ............ · · · · · · Figure 7 1/16 Duty Cycle Drive Waveforms LCD Interface Configurations ...

9–30 EPSON SED1278 MPU INTERFACE The SED1278 has selectable 8- or 4-bit MPU interface.An example of a typical 8-bit MPU interface is shownfigure 8. Z80 SED1278 G1 A B C G2A G2B Y0 A0 A4 A5 A6 A7 IORQ RD WR DB0toDB7 D0toD7 R/ W E RS Figure 8 Interfacing the SED1278 to the Zilog Z80®

EPSON 9–31 SED1278 SED1278 COMPARISON WITH HD44780 BY HITACHI Item HD44780 (Hitachi) SED1278 Data display RAM 80 bytes ← Character generator ROM 192 types 240 types Character font 5 × 7: 160 types 5 × 10: 32 types 5 × 10: 240 types Character generator RAM 64 bytes ← LCD drive output 16 common driver...

9–38 EPSON SED1278 APPENDIX B: PIN CONSTRUCTION Input Pin Type 1 • E• OSC1 V DD V SS Input Pin Type 2 • RS• R/W V DD Pin V SS

10–2 EPSON SED1280 Number Name Description 1 V SS Ground 2 to 6 V 1 to V 5 LCD controller power supply inputs 7 LP Data latch pulse output 8 XSCL Data transfer clock 9 V DD 5 V supply 10 FR LCD AC controller output 11 DO Serial data output 12 SCK 1 MHz system clock input 13 SID Serial data input 14 ...

EPSON 10–3 SED1280 SED1280 SPECIFICATIONS Absolute Maximum Ratings Note: V DD ≥ V 1 ≥ V 2 ≥ V 3 ≥ V 4 ≥ V 5 ≥ V SS = 0 V Recommended Operating Conditions Parameter Symbol Rating Unit Supply voltage range V DD –0.3 to 7.0 V V 1 to V 5 –0.3 to V DD +0.3 V Input voltage range V I –0.3 to V DD +0.3 V Op...

10–4 EPSON SED1280 DC Electrical Characteristics Latch-up endurance Static breakdown resistance V DD = 5.0 V, V SS = 0 V, Ta = –20 to 75 ° C Parameter Symbol Condition Rating Unit min typ max Supply current I OP – – 1 mA SCK and SID LOW-level input voltage V IL1 – – 0.8 V EI1 to EI3 LOW-level input ...

EPSON 10–5 SED1280 SED1280 Measurement conditions The measurement circuit is shown in the followingfigure. The switch is in position A until capacitor Ccharges to V C volts. It then switches to position B and the capacitor discharges through the device under test (DUT),applying a surge voltage to th...

10–6 EPSON SED1280 LP FR XSCL DO 0.9V DD 0.1V DD 0.9V DD 0.1V DD 0.9V DD 0.1V DD t WCLH t DSLP t DSLP t WCLH t DFR t OSX t DXH t WCLL Reset timing V DD = 5.0 V, V SS = 0 V, Ta = –20 to 75 ° C V DD RST 4.5 V 4.5 V 0.2 V 0.2 V t r t RST t f Note: 0.1 ms ≤ t r ≤ 10 ms, t f ≥ 1 ms, t RST ≥ 30 ms. FUNCTI...

EPSON 10–7 SED1280 SED1280 Serial data transmission SWC1 to SWC10 and EI1 to EI3 are scanned and theirinput logic levels transmitted serially from SOD as shown in the following figure. Data is clocked out on thefalling edge of SCK. As the state of SOD is undefined after power-ON, RSTshould be moment...

EPSON 10–9 SED1280 SED1280 If the host does not check ST1, it should determine whento send new data by calculating the processing time ofeach data block as shown in the following figure. 5 ms After resetting Register address to DB7 DB0 0 0 0 0 0 1 1 0 0 1 1 0 0 1 1 X X X X X X X X X X X X 0 0 0 1 1 ...

10–10 EPSON SED1280 Data transmission flow charts The following figures show the 1278 core display dataRAM processing when data is transferred from the hostto the SED1280. Transmission using the busy bit Start Register address 0 1 Address data DDRAM write data 1 2 X X X X X X X X DB7 to DB0 Finished...

EPSON 10–11 SED1280 SED1280 System Registers The system registers access the data display RAM,character generator RAM and LED display RAM. Thesewrite-only registers are addressed using RA0 to RA2 asshown in the following table. Address Name Function RA2 RA1 RA0 0 0 0 1278 instruction register Sets t...

10–12 EPSON SED1280 1278 instruction register The following table shows the 1278 instructions. The control bit functions are shown in the followingtable. Instruction Code Cycles Description DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Clears the entire display and Display Clear 0 0 0 0 0 0 0 1 1640 resets the di...

EPSON 10–13 SED1280 SED1280 Key Scanning An 8 × 10-key matrix can be scanned using SWS1 to SWS8 scan outputs and SWC1 to SWC10 scan inputs.The SWS1 timing during one scan interval and SWS1 toSWS8 timing during several scans are shown in thefollowing figures. SWS1 SWS1 SWS2 SWS3 SWS8 5 ms 5 ms 5ms 80...

10–14 EPSON SED1280 LED controller timing The LED controller timing for one scan and a series ofscans is shown in the following figures. SWS1 SWS2 SWS3 SWS8 LE1 LE2 LE1 RST 1.0 ms LED control period Key scan period 0.9 ms 1.0 ms 1.0 ms 0.9 ms 0.9 ms LE2 LE5 LE5 5 ms 5 ms 40 ms ... ... LED controller...

EPSON 10–15 SED1280 SED1280 APPLICATION CIRCUITS LCD Controller Resistor Divider V DD V 1 V 2 V 3 V 4 V 5 V SS 5 V C0 EO1 SED1280F EO2 Note: C0 is connected between V DD and V SS to prevent noise, and should be 0.1 µ F or greater.

EPSON 10–17 SED1280 SED1280 LED Matrix Connections LE1 V DD LE2 to LE5 SWS1 SED1280F SWS2 to SWS8 To key matrix Key Switch Matrix Connections SWS1 To LED matrix SWS2 SWS8 SWC1 SED1280F SWC2 to to SWC10 Note: Do not press two or more keys simultaneously.

AMERICA S-MOS SYSTEMS, INC. 150 River Oaks ParkwaySan Jose, CA 95134, U.S.A.Phone: +1-408-922-0200 Fax: +1-408-922-0238 Telex: 176079 SMOS SNJUD S-MOS SYSTEMS, INC.EASTERN AREA SALES AND TECHNOLOGYCENTER 301 Edgewater Place, Suite 120Wakefield, MA 01880, U.S.A.Phone: +1-617-246-3600 Fax: +1-617-246-...

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SED1200 Series LCD Controller/Drivers First issue Nov. 1990 U Printed May, 1998 in Japan H B ■ Electronic Devices Information on the EPSON WWW Server ELECTRONIC DEVICES MARKETING DIVISION http: / /www.epson.co.jp

13 SED1278F/D ELECTRONIC DEVICES MARKETING DIVISION IC Marketing & Engineering Group ED International Marketing Department I (Europe & U.S.A.) 421-8, Hino, Hino-shi, Tokyo 191-8501, JAPANPhone: +81-(0)42-587-5812 Fax: +81-(0)42-587-5564 ED International Marketing Department II (Asia) 421-8, ...