Texas Instruments SPRU938B - Manual

Texas Instruments SPRU938B

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Table of Contents:

  • Page 3 – Contents
  • Page 7 – Read This First; About This Manual; This document uses the following conventions.; Related Documentation From Texas Instruments; . Tip: Enter the literature number in the search box; Trademarks; VLYNQ is a trademark of Texas Instruments.
  • Page 8 – Introduction; Purpose of the Peripheral
  • Page 9 – Figure 1; Figure 1. VLYNQ Port Functional Block Diagram
  • Page 10 – Clock Control; VLYNQ; Peripheral Architecture; The reset value of the CLKDIR bit is 0 (external clock source).; Figure 2. External Clock Block Diagram
  • Page 11 – The VLYNQ interface signals are shown in; Table 1. VLYNQ Signal Descriptions; Pin Name; Appendix A
  • Page 12 – VLYNQ Functional Description; Figure 4; Figure 4. VLYNQ Module Structure
  • Page 13 – Write Operations; The data flow between two VLYNQs that are connected is shown in; Figure 5. Write Operations
  • Page 14 – Read Operations; Figure 6; Figure 6. Read Operations
  • Page 15 – Initialization; Appendix B
  • Page 16 – Address Translation; Figure 7
  • Page 17 – Figure 7. Example Address Memory Map; Table 2; Register
  • Page 18 – Table 3
  • Page 19 – Flow Control; Example 1. Address Translation Example
  • Page 20 – Reset Considerations; Software Reset Considerations; Interrupt Support; Interrupt Events and Requests; . Additionally, there is a software reset; CAUTION; Writing directly to the INTPENDSET
  • Page 21 – Writes to Interrupt Pending/Set Register; The VLYNQ interrupt generation mechanism is shown in; Figure 8. Interrupt Generation Mechanism Block Diagram
  • Page 22 – EDMA Event Support; Set the INT2CFG bit to 1 in the VLYNQ control register (CTRL).
  • Page 23 – The power conservation modes that are available via the PSC are:
  • Page 24 – VLYNQ Port Registers; Table 4; Table 4. VLYNQ Register Address Space; Table 5; Table 5. VLYNQ Port Controller Registers
  • Page 25 – Figure 9; Bit
  • Page 26 – and described in
  • Page 31 – Table 12. Interrupt Pointer Register (INTPTR) Field Descriptions
  • Page 33 – Receive Address Map Size 1 Register (RAMS1)
  • Page 37 – Table 23. Auto Negotiation Register (AUTNGO) Field Descriptions
  • Page 38 – Remote Configuration Registers; The remote configuration registers listed in; Table 24. VLYNQ Port Remote Controller Registers; Offset
  • Page 39 – Appendix A VLYNQ Protocol Specifications
  • Page 40 – VLYNQ 2.0 Packet Format; The byte disable symbol masks bytes for write operations.
  • Page 41 – Field
  • Page 42 – . This protocol can be extended to apply to multiple channels
  • Page 44 – Appendix B Write/Read Performance; encoding is removed, the maximum write rate is 396
  • Page 45 – Write Performance
  • Page 46 – Read Performance; Table B-3. Relative Performance with Various Latencies; Throughput
  • Page 47 – Appendix C Revision History; Appendix C; Reference
  • Page 48 – IMPORTANT NOTICE; Products
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TMS320DM643x DMP

VLYNQ Port

User's Guide

Literature Number: SPRU938B

September 2007

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Summary

Page 3 - Contents

Contents Preface ............................................................................................................................... 7 1 Introduction ................................................................................................................ 8 1.1 Purpose of the Peri...

Page 7 - Read This First; About This Manual; This document uses the following conventions.; Related Documentation From Texas Instruments; . Tip: Enter the literature number in the search box; Trademarks; VLYNQ is a trademark of Texas Instruments.

Preface SPRU938B – September 2007 Read This First About This Manual This document describes the VLYNQ port in the TMS320DM643x Digital Media Processor (DMP). Notational Conventions This document uses the following conventions. • Hexadecimal numbers are shown with the suffix h. For example, the follo...

Page 8 - Introduction; Purpose of the Peripheral

1 Introduction 1.1 Purpose of the Peripheral 1.2 Features User's Guide SPRU938B – September 2007 VLYNQ Port The VLYNQ™ communications interface port is a low pin count, high-speed, point-to-point serial interfacein the TMS320DM643x Digital Media Processor (DMP) used for connecting to host processors...

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