Texas Instruments SCAU020 - Manual

Texas Instruments SCAU020

Texas Instruments SCAU020 – Manual, read for free online in PDF format. We hope this helps you resolve any issues you may have. If you have further questions, please contact us through the contact form.

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Table of Contents:

  • Page 3 – Contents
  • Page 5 – General Description; MHz–1175MHz Low Phase Noise Clock Evaluation; Figure 1. CDCE421EVM Evaluation Board; Figure 1
  • Page 6 – Signal Path and Control Circuitry; Figure 2; Figure 2. CDCE421EVM Programming Blocks
  • Page 7 – Block A; Software-Selectable Options; Block Description; This section discusses the four EVM blocks.
  • Page 8 – Installing the Software GUI and USB Driver; system or higher (including Windows XP; Figure 3. Software Installation Screen
  • Page 9 – Using Software-Enabled Automatic PLL Selection; ChronosGUI; Figure 5; Figure 5; IC Block Configuration and Input Calculator.
  • Page 10 – Output Calculator and Apply PLL Settings.; Figure 6; Figure 6. Chronos GUI—Loop Filter Configuration Pop-Up
  • Page 11 – Manual PLL Block Selection (Advanced Control); Figure 7; Figure 7. Chronos GUI—Manual PLL Block Selection Pop-Up
  • Page 12 – Table 1; Table 1. Software Settings Description
  • Page 13 – Programming Configuration (USB Cable Attached); Configuring the Board; as explained earlier.; EVM software, followed by pushing the Apply button (see; Figure 8. JP1 Setting for USB Programming Configuration; Figure 8
  • Page 14 – Schematics and Layout; Figure 9. CDCE421EVM Block Switch Off; through
  • Page 15 – Figure 10. CDCE421EVM Board Schematic
  • Page 16 – Figure 11. CDCE421EVM Board—Block A Schematic
  • Page 17 – Figure 12. CDCE421EVM Board—Block B Schematic
  • Page 18 – Figure 13. CDCE421EVM Board—Block C Schematic
  • Page 19 – Figure 14. CDCE421EVM Board—Block D Schematic
  • Page 21 – IMPORTANT NOTICE
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10.9MHz–1175MHz Low Phase Noise
Clock Evaluation Board

User's Guide

March 2007

Serial Link Products

SCAU020

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Summary

Page 3 - Contents

Contents 1 General Description ..................................................................................................... 5 2 Signal Path and Control Circuitry .................................................................................. 6 3 Block Description ...........................

Page 5 - General Description; MHz–1175MHz Low Phase Noise Clock Evaluation; Figure 1. CDCE421EVM Evaluation Board; Figure 1

1 General Description User's Guide SCAU020 – March 2007 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board Figure 1. CDCE421EVM Evaluation Board Features: • Easy-to-use evaluation module generates low phase noise clocks between10.9MHz—1175MHz • Simple device programming via host-powered USB port...

Page 6 - Signal Path and Control Circuitry; Figure 2; Figure 2. CDCE421EVM Programming Blocks

www.ti.com 2 Signal Path and Control Circuitry Signal Path and Control Circuitry The CDCE421 can accept a 27MHz—38.33MHz frequency input from either an LVCMOS source (up to3.3V) or a crystal in the same frequency range. The CDCE421EVM is divided into four blocks. The programming section and device p...

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