Page 3 - Contents
Contents 1 General Description ..................................................................................................... 5 2 Signal Path and Control Circuitry .................................................................................. 6 3 Block Description ...........................
Page 5 - General Description; MHz–1175MHz Low Phase Noise Clock Evaluation; Figure 1. CDCE421EVM Evaluation Board; Figure 1
1 General Description User's Guide SCAU020 – March 2007 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board Figure 1. CDCE421EVM Evaluation Board Features: • Easy-to-use evaluation module generates low phase noise clocks between10.9MHz—1175MHz • Simple device programming via host-powered USB port...
Page 6 - Signal Path and Control Circuitry; Figure 2; Figure 2. CDCE421EVM Programming Blocks
www.ti.com 2 Signal Path and Control Circuitry Signal Path and Control Circuitry The CDCE421 can accept a 27MHz—38.33MHz frequency input from either an LVCMOS source (up to3.3V) or a crystal in the same frequency range. The CDCE421EVM is divided into four blocks. The programming section and device p...
Page 7 - Block A; Software-Selectable Options; Block Description; This section discusses the four EVM blocks.
www.ti.com 3 Block Description 3.1 Block A 3.2 Block B 3.3 Block C 3.4 Block D 4 Software-Selectable Options Block Description This section discusses the four EVM blocks. Block A includes a CDCE421 QFN device that accepts an LVCMOS reference input through the verticalSMA input connector (Ref Input) ...
Page 8 - Installing the Software GUI and USB Driver; system or higher (including Windows XP; Figure 3. Software Installation Screen
www.ti.com 5 Installing the Software GUI and USB Driver Installing the Software GUI and USB Driver The CDCE421EVM software can be installed on a PC running the Microsoft Windows ® 2000 operating system or higher (including Windows XP ® ). To start software installation, run the ChronosSetup.msi file...
Page 9 - Using Software-Enabled Automatic PLL Selection; ChronosGUI; Figure 5; Figure 5; IC Block Configuration and Input Calculator.
www.ti.com 6 ChronosGUI 6.1 Using Software-Enabled Automatic PLL Selection ChronosGUI After the setup wizard completes, start the GUI interface from the Start menu (Start → Texas Instruments → Chronos Eval → TIChronosGUI.exe). Connect the USB cable to the EVM. If Microsoft Windows prompts you for an...
Page 10 - Output Calculator and Apply PLL Settings.; Figure 6; Figure 6. Chronos GUI—Loop Filter Configuration Pop-Up
www.ti.com ChronosGUI frequency should be entered here in this format: xx.xxx (specified in MHz). Step 3. Output Calculator and Apply PLL Settings. The second row of calculations is used to obtain the PLL settings necessary to achieve a particularoutput frequency provided a given input frequency to ...
Page 11 - Manual PLL Block Selection (Advanced Control); Figure 7; Figure 7. Chronos GUI—Manual PLL Block Selection Pop-Up
www.ti.com 6.2 Manual PLL Block Selection (Advanced Control) ChronosGUI The advanced control screen helps to set the PLL without having to manually alter the individual blockswithin the PLL. If a user is familiar with PLL operation, one may activate individual control of the PLLblocks by clicking on...
Page 12 - Table 1; Table 1. Software Settings Description
www.ti.com ChronosGUI Table 1 lists the various menu items in this screen. Table 1. Software Settings Description Section Function VCO Select Selects between VCO1 and VCO2. Only one VCO can be usedduring operation. See CDCE421 data sheet for VCO tuning ranges. Prescalar The prescalar selection is de...
Page 13 - Programming Configuration (USB Cable Attached); Configuring the Board; as explained earlier.; EVM software, followed by pushing the Apply button (see; Figure 8. JP1 Setting for USB Programming Configuration; Figure 8
www.ti.com 7 Configuring the Board 7.1 Programming and Testing Configuration (USB Cable Attached)—Default Configuration 7.2 Programming Configuration (USB Cable Attached) AUX Using external3.3V supply Using only USBpower supply 7.3 Testing Configuration from a Saved Configuration (with USB Cable Rem...
Page 14 - Schematics and Layout; Figure 9. CDCE421EVM Block Switch Off; through
www.ti.com 8 Schematics and Layout Schematics and Layout Figure 9. CDCE421EVM Block Switch Off Figure 10 through Figure 14 show the printed circuit board (PCB) schematics. Note: Board layouts are not to scale. These figures are intended to show how the board is laidout; they are not intended to be u...
Page 15 - Figure 10. CDCE421EVM Board Schematic
www.ti.com Schematics and Layout Figure 10. CDCE421EVM Board Schematic SCAU020 – March 2007 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board 15 Submit Documentation Feedback
Page 16 - Figure 11. CDCE421EVM Board—Block A Schematic
www.ti.com Schematics and Layout Figure 11. CDCE421EVM Board—Block A Schematic 16 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board SCAU020 – March 2007 Submit Documentation Feedback
Page 17 - Figure 12. CDCE421EVM Board—Block B Schematic
www.ti.com Schematics and Layout Figure 12. CDCE421EVM Board—Block B Schematic SCAU020 – March 2007 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board 17 Submit Documentation Feedback
Page 18 - Figure 13. CDCE421EVM Board—Block C Schematic
www.ti.com Schematics and Layout Figure 13. CDCE421EVM Board—Block C Schematic 18 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board SCAU020 – March 2007 Submit Documentation Feedback
Page 19 - Figure 14. CDCE421EVM Board—Block D Schematic
www.ti.com Schematics and Layout Figure 14. CDCE421EVM Board—Block D Schematic SCAU020 – March 2007 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board 19 Submit Documentation Feedback
Page 21 - IMPORTANT NOTICE
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.Customers should obtain the l...