National Instruments 320174B-01 - Manual

National Instruments 320174B-01

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Table of Contents:

  • Page 5 – Contents; About This Manual
  • Page 6 – of
  • Page 8 – Glossary
  • Page 9 – Figures
  • Page 10 – Control
  • Page 11 – Organization of This Manual; The Lab-NB User Manual is organized as follows.
  • Page 12 – Conventions Used in This Manual; The following conventions are used in this manual.; bold; bold italic; National Instruments Documentation
  • Page 13 – Related Documentation; Inside Macintosh–Volume 5; Customer Communication
  • Page 14 – Detailed Lab-NB specifications are in Appendix A, Specifications.
  • Page 15 – What You Need to Get Started; To set up and use your Lab-NB board, you will need the following:; Software Programming Choices; LabVIEW and LabWindows/CVI Application Software
  • Page 16 – NI-DAQ Driver Software; Figure 1-1. The Relationship between the Programming Environment,
  • Page 17 – Register-Level Programming; Optional Equipment; Cables and cable assemblies, shielded and ribbon; Cabling
  • Page 18 – Unpacking; Never touch the exposed pins of connectors.
  • Page 19 – Board Configuration
  • Page 21 – Factory Default Jumper Settings; Jumpers W1 and W2–bipolar analog output; Configuration; Analog Output Configuration; Bipolar Output Selection; Analog Output Channel 0
  • Page 22 – Unipolar Output Selection; Analog Input Configuration; Bipolar Input Selection
  • Page 23 – Figure 2-4. Bipolar Input Jumper Configuration; Unipolar Input Selection; Analog Input; Installation; I/O Connector Pin Description
  • Page 24 – liable for any damages resulting from any such
  • Page 25 – Signal Connection Descriptions; Analog Input Signal Connections
  • Page 26 – liable for any damages
  • Page 27 – Analog Output Signal Connections
  • Page 28 – Digital I/O Signal Connections
  • Page 29 – Port C Pin Connections
  • Page 30 – Timing Specifications
  • Page 32 – Mode 1 Input Timing; Name; All timing values are in nanoseconds.
  • Page 33 – Mode 1 Output Timing
  • Page 34 – Mode 2 Bidirectional Timing
  • Page 35 – Timing Connections; DAQ Timing Connections
  • Page 38 – Figure 2-14. Waveform Generation Timing with the EXTUPDATE* Signal
  • Page 43 – Functional Overview
  • Page 44 – NuBus Interface Circuitry
  • Page 45 – Analog Input and DAQ Circuitry; Figure 3-3. Analog Input and DAQ Circuitry Block Diagram
  • Page 46 – Analog Input Circuitry
  • Page 47 – Single-Channel Data Acquisition
  • Page 48 – DAQ Rates; Table 3-1. Analog Input Settling Time Versus Gain; Gain Setting; Any Gain Setting; Multichannel Data Acquisition:
  • Page 49 – Table 3-3. Bipolar Analog Input Signal Range Versus Gain; Table 3-4. Unipolar Analog Input Signal Range Versus Gain; Analog Output Circuitry
  • Page 50 – Figure 3-4. Analog Output Circuitry Block Diagram; ) multiplied by the digital
  • Page 51 – Digital I/O Circuitry
  • Page 54 – Register Access; Slot Address Space
  • Page 55 – Slot Number; Register Map
  • Page 56 – Offset
  • Page 57 – Register Sizes; Register Descriptions; Register Description Format
  • Page 58 – Analog Input Register Group
  • Page 59 – A/D Configuration Register; Bit; TBSEL
  • Page 60 – PRETRIG; Selected Channel
  • Page 61 – Gain Bit—These three bits select the gain setting as follows:; Selected Gain; TWOSCMP
  • Page 62 – Status Register; OVERRUN
  • Page 63 – Straight binary mode
  • Page 64 – Two’s complement binary mode
  • Page 65 – Not applicable, no bits used
  • Page 66 – Analog Output Register Group
  • Page 67 – DAC Configuration Register; TMRWGN1
  • Page 68 – DAC0 and DAC1 Data Registers
  • Page 69 – 253 Counter/Timer Register Groups
  • Page 70 – Counter A0 Data Register
  • Page 71 – Counter A1 Data Register
  • Page 72 – Counter A2 Data Register
  • Page 73 – Counter A Mode Register
  • Page 74 – Counter B0 Data Register
  • Page 75 – Counter B1 Data Register
  • Page 76 – Counter B2 Data Register
  • Page 77 – Counter B Mode Register
  • Page 78 – 2C55A Digital I/O Register Group
  • Page 79 – Port A Register
  • Page 80 – Port B Register
  • Page 81 – Port C Register
  • Page 82 – Digital Control Register
  • Page 83 – Interrupt Control Register Group
  • Page 84 – Interrupt Control Register; PAINTEN
  • Page 85 – ADCINTEN
  • Page 86 – Interrupt Status Register; INT
  • Page 87 – Timer Interrupt Clear Register
  • Page 88 – Configuration EPROM; Register Programming Considerations
  • Page 89 – This sequence leaves the Lab-NB circuitry in the following state:; Programming the Analog Input Circuitry; Analog Input Circuitry Programming Sequence; Each of these steps is discussed in detail as follows.
  • Page 90 – Select analog input channel and gain.
  • Page 91 – A/D FIFO Output Binary Modes
  • Page 92 – Clearing the Analog Input Circuitry; Analog input error flags OVERFLOW and OVERRUN are cleared.; Programming Multiple A/D Conversions on a Single Input Channel; Controlled acquisition mode
  • Page 93 – Programming in Controlled Acquisition Mode; Each of these programming steps is explained below.
  • Page 94 – Program counters A0 and A1.
  • Page 95 – Service the DAQ operation.
  • Page 96 – Programming in Freerun Acquisition Mode; Program counter A0 to force OUT0 high.
  • Page 97 – Program count
  • Page 98 – External Timing Considerations for Multiple A/D Conversions
  • Page 99 – Using the EXTCONV* Signal to Initiate A/D Conversions; Programming Multiple A/D Conversions Using External Timing; Posttrigger Mode
  • Page 100 – Each of these programming steps is explained as follows.
  • Page 101 – To program the counters, use the following programming sequence:
  • Page 102 – Pretrigger Mode
  • Page 103 – Program counter A1 and enable EXTCONV* input.
  • Page 104 – Programming Multiple A/D Conversions with Channel Scanning
  • Page 105 – Interrupt Programming for the Analog Input Circuitry
  • Page 106 – Digital Code; digital code
  • Page 107 – Table 4-6. Analog Output Voltage Versus Digital Code; Interrupt Programming for the Analog Output Circuitry; Set up the DAC Configuration Register.
  • Page 108 – Install an interrupt service routine.; Programming the Digital I/O Circuitry; The three basic modes of operation for the 82C55A are as follows:
  • Page 110 – Register Descriptions and Programming Examples
  • Page 112 – Example 2. Configure port A for input, port B and port C for output:
  • Page 115 – INTEA
  • Page 117 – IBFA
  • Page 118 – Interrupt Programming for the Digital I/O Circuitry
  • Page 119 – Calibration Equipment Requirements
  • Page 120 – Calibration Trimpots
  • Page 121 – Analog Input Calibration; Offset errors
  • Page 122 – Input Range; Offset Calibration; To adjust the amplifier input offset:
  • Page 123 – Unipolar Input Calibration Procedure; Analog Output Calibration; Analog output offset error
  • Page 124 – Adjust the Analog Output Offset; For analog output channel 0:
  • Page 125 – Unipolar Output Calibration Procedure
  • Page 126 – For analog output channel 1:; Adjust the Analog Output Gain
  • Page 127 – Explanation of Analog Input Specifications
  • Page 128 – Analog Data Acquisition
  • Page 129 – Explanation of Analog Output Specifications; Power Requirements (from Macintosh NuBus)
  • Page 130 – Physical
  • Page 162 – Branch Offices
  • Page 163 – Technical Support Form
  • Page 165 – Documentation Comment Form
  • Page 166 – Prefix
  • Page 168 – Index
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© Copyright 1989, 1995 National Instruments Corporation.

All Rights Reserved.

Lab-NB

User Manual

Low-Cost Multifunction I/O Board for Macintosh NuBus

September 1995 Edition

Part Number 320174B-01

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Summary

Page 5 - Contents; About This Manual

© National Instruments Corporation v Lab-NB User Manual Contents About This Manual ............................................................................................................ xi Organization of This Manual ................................................................................

Page 6 - of

Contents Lab-NB User Manual vi © National Instruments Corporation Chapter 3Theory of Operation ........................................................................................................... 3-1 Functional Overview.............................................................................

Page 8 - Glossary

Contents Lab-NB User Manual viii © National Instruments Corporation Chapter 5Calibration ............................................................................................................................. 5-1 Calibration Equipment Requirements .................................................

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