Page 3 - description
TMS320 SECOND-GENERATION DEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 3 description The TMS320 family of 16/32-bit single-chip digital signal processors combines the flexibility of a high-speedcontroller with the numerical capability of an array pro...
Page 5 - TMS320 SECOND-GENERATION; Table 1. TMS320 Second-Generation Device Overview; architecture; Branch to an address specified by the accumulator
DEVICE RAM ROM/EPROM PROG DATA TIMER CYCLE TIME (ns) TYP POWER (mW) PACKAGE TYPE I/O† TMS320 SECOND-GENERATION DEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 5 Table 1 provides an overview of the second-generation TMS320 processors with comparisons of...
Page 7 - scaling shifter; PRD; memory control
TMS320 SECOND-GENERATION DEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 7 scaling shifter The TMS320C2x scaling shifter has 16-bit input connected to the data bus and a 32-bit output connected to theALU. The scaling shifter produces a left shift of 0 ...
Page 8 - Figure 1. Memory Maps
TMS320 SECOND-GENERATIONDEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 8 Pages 8 -511 Interrupts and Reserved (External) External Interrupts and Reserved (On-Chip ROM/EPROM) On-Chip Memory-Mapped Registers On-Chip ROM/EPROM Reserved Reserved On-Chip B...
Page 9 - interrupts and subroutines; A standalone processor
TMS320 SECOND-GENERATION DEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 9 interrupts and subroutines The TMS320C2x has three external maskable user interrupts INT2-INT0, available for external devices thatinterrupt the processor. Internal interrupts a...
Page 10 - instruction set; addressing modes
TMS320 SECOND-GENERATIONDEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 10 instruction set The TMS320C2x microprocessor implements a comprehensive instruction set that supports bothnumeric-intensive signal processing operations as well as general-purpo...
Page 11 - instruction set summary
TMS320 SECOND-GENERATION DEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 11 instruction set summary Table 2 lists the symbols and abbreviations used in Table 3, the TMS320C25 instruction set summary. Table 3consists primarily of single-cycle, single-wo...
Page 12 - Table 3. TMS320C25 Instruction Set Summary
S NO. WORDS D DESCRIPTION D D K D D S D S S D D S D S S X D D X S D D D D K D MNEMONIC K INSTRUCTION BIT CODE TMS320C25 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 12 Table 3. TMS320C25 Instruction Set Summary ACCUMULATOR MEMORY REFERENCE INSTRUCTIONS 15 1...
Page 18 - development support
TMS320 SECOND-GENERATIONDEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 18 development support Together, Texas Instruments and its authorized third-party suppliers offer an extensive line of developmentsupport products to assist the user in all aspects...
Page 19 - Table 4. TMS320 Second-Generation Software and Hardware Support
TMS320 SECOND-GENERATION DEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 19 Table 4. TMS320 Second-Generation Software and Hardware Support SOFTWARE TOOLS PART NUMBER Macro Assembler/Linker IBM MS/PC-DOS TMDS3242850-02 VAX/VMS TMDS3242250-08 VAX ULTRIX...
Page 20 - documentation support; Digital Signal Processing; specification overview
TMS320 SECOND-GENERATIONDEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 20 documentation support Extensive documentation supports the second-generation TMS320 devices from product announcementthrough applications development. The types of documentation...
Page 21 - CC; recommended operating conditions; ADV
High-level input voltage Low-level input voltage VIL VIH TMS32020 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 21 absolute maximum ratings over specified temperature range (unless otherwise noted)† Supply voltage range, V CC ‡ – 0.3 V to 7 V . . . . . . . ....
Page 22 - and be specified at a load capacitance of 20 pF.; Figure 2. Internal Clock Option; external clock option
TMS32020 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 22 CLOCK CHARACTERISTICS AND TIMING The TMS32020 can use either its internal oscillator or an external frequency source for a clock. internal clock option The internal oscillator is enabled by connecting...
Page 24 - MEMORY AND PERIPHERAL INTERFACE TIMING
TMS32020 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 24 MEMORY AND PERIPHERAL INTERFACE TIMING switching characteristics over recommended operating conditions (see Note 3) PARAMETER MIN TYP MAX UNIT td(C1-S) STRB from CLKOUT1 (if STRB is present) Q – 15 Q ...
Page 25 - HOLD TIMING
TMS32020 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 25 RS, INT, BIO, AND XF TIMING switching characteristics over recommended operating conditions (see Note 3 and 8) PARAMETER MIN TYP MAX UNIT td(RS) CLKOUT1 low to reset state entered 45 ns td(IACK) CLKOU...
Page 26 - SERIAL PORT TIMING
TMS32020 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 26 SERIAL PORT TIMING switching characteristics over recommended operating conditions (see Note 3) PARAMETER MIN TYP MAX UNIT td(CH-DX) DX valid after CLKX rising edge (see Note 10) 100 ns td(FL-DX) DX v...
Page 28 - , a power dissipation
TMS320C25, TMS320E25 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 28 CLOCK CHARACTERISTICS AND TIMING The TMS32025 can use either its internal oscillator or an external frequency source for a clock. internal clock option The internal oscillator is enabled b...
Page 29 - Figure 3. External Clock Option; Hardware Interfacing to the TMS320C25 (document number; Figure 4. Test Load Circuit
TMS320C25, TMS320E25 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 29 timing requirements over recommended operating conditions (see Note 3) MIN NOM MAX UNIT tc(CI) CLKIN cycle time 24.4 150 ns tf(CI) CLKIN fall time 5† ns tr(CI) CLKIN rise time 5† ns tw(CIL...
Page 30 - Figure 5. Voltage Reference Levels
TMS320C25, TMS320E25 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 30 0.80 V 0.92 V 1.88 V 2.0 V 0 VIH (Min) VIL (Max) (a) Input 0.6 V 0.8 V 2.2 V 2.4 V 0 VOH (Min) VOL (Max) (b) Output Figure 5. Voltage Reference Levels MEMORY AND PERIPHERAL INTERFACE TIMIN...
Page 33 - EPROM PROGRAMMING; Supply voltage range, V; PP; Input voltage range on pins 24 and 25
TMS320E25 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 33 EPROM PROGRAMMING absolute maximum ratings over specified temperature range (unless otherwise noted) † Supply voltage range, V PP ‡ – 0.6 V to 15 V . . . . . . . . . . . . . . . . . . . . . . . . . ....
Page 35 - CLOCK CHARACTERISTICS AND TIMING; internal clock option; , a power dissipation of 1 mW, and be specified; Figure 6. Internal Clock Option
TMS320C25-50 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 35 CLOCK CHARACTERISTICS AND TIMING The TMS320C25-50 can use either its internal oscillator or an external frequency source for a clock. internal clock option The internal oscillator is enabled by co...
Page 36 - Figure 7. External Clock Option
TMS320C25-50 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 36 +5 V fcrystal 4.7 k Ω 10 k Ω 74HC04 F11 CLKIN 47 pF 74AS04 10 k Ω C = 20 pF 0.1 µ F L TMS320C25 TMS320C25TMS320C25-50TMS320E25 40.9651.2040.96 1.81.01.8 fcrystal, (MHz) L, ( µ H) Figure 7. Externa...
Page 41 - TIMING DIAGRAMS
TMS320 SECOND-GENERATION DEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 41 TIMING DIAGRAMS This section contains all the timing diagrams for the TMS320 second-generation devices. Refer to the top cornerof page for the specific device. Timing measureme...
Page 42 - memory read timing
TMS320 SECOND-GENERATIONDEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 42 memory read timing CLKOUT1 CLKOUT2 STRB A15-A0, BR, PS, DS or IS R/W READY D15-D0 td(C1-S) td(C1-S) td(C2-S) td(C2-S) tsu(A) tw(SL) th(A) tw(SH) td(SL-R) tsu(D)R th(SL-R) th(D)R...
Page 43 - memory write timing
TMS320 SECOND-GENERATION DEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 43 memory write timing CLKOUT1 CLKOUT2 STRB A15-A0, BR, PS, DS or IS R/W READY D15-D0 Valid Data Out tsu(A) th(A) tsu(D)W tdis(D) ten(D) th(D)W ADV ANCE INFORMA TION
Page 44 - one wait-state memory access timing
TMS320 SECOND-GENERATIONDEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 44 one wait-state memory access timing CLKOUT1 CLKOUT2 STRB A15-A0, BR, PS, DS, R/W or IS MSC READY D15-D0 (For Read Operation) Data In Data Out th(C2H-R) Valid D15-D0 (For Write O...
Page 45 - reset timing
TMS320 SECOND-GENERATION DEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 45 reset timing CLKOUT1 RS A15-A0 D15-D0 PS STRB Control Signals† IACK Serial Port Control‡ FetchLocation 0 Begin Program Execution Valid Valid td(RS) tsu(IN) th(IN) tsu(IN) tw(RS...
Page 47 - serial port receive timing
TMS320 SECOND-GENERATION DEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 47 serial port receive timing tc(SCK) tw(SCK) tw(SCK) tf(SCK) th(DR) th(FS) tsu(DR) tsu(FS) CLKR FSR DR tr(SCK) serial port transmit timing CLKX FSX (Input, TXM = 0) DX FSX (Outpu...
Page 54 - TYPICAL SUPPLY CURRENT CHARACTERISTICS FOR TMS320C25; TMS320C25FNL (PLCC) reflow soldering precautions; no special handling; NOTE; Shipping tubes will not withstand the 125
TMS320 SECOND-GENERATIONDEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 54 TYPICAL SUPPLY CURRENT CHARACTERISTICS FOR TMS320C25 170160150140130120110100 90807060504030 10 20 4 8 12 16 20 24 28 32 36 40 44 48 52 TA = 25 ° C ICC vs f(CLKIN) and VCC Norma...
Page 55 - MECHANICAL DATA
TMS320 SECOND-GENERATION DEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 55 MECHANICAL DATA 68-pin GB grid array ceramic package (TMS32020, TMS320C25) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES 28,448 (1.120)27,432 (1.080) 4...
Page 56 - WARNING
TMS320C25TMS320C25-50 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 56 68-lead plastic leaded chip carrier package (TMS320C25 and TMS320C25-50) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES 25,27 (0.995)25,02 (0.985) 24,33 (0.956)24,...
Page 58 - programming the TMS320E25 EPROM cell; Figure 8. EPROM Adapter Socket
TMS320E25 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 58 programming the TMS320E25 EPROM cell The TMS320E25 includes a 4K × 16-bit EPROM, implemented from an industry-standard EPROM cell, to perform prototyping and early field testing and to achieve low-vo...
Page 60 - , filterless UV lamp will erase the device in 21 minutes. The; fast programming; can be programmed in any order.
TMS320E25 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 60 Table 5 shows the programming levels required for programming, verifying and reading the EPROM cell. Theparagraphs following the table describe the function of each programming level. Table 5. TMS320...
Page 61 - program verify; Programmed bits may be verified with V; the timing for the program and verify operation.; Figure 10. Fast Programming Flowchart
TMS320E25 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 61 program verify Programmed bits may be verified with V PP = 12.5 V when G = V IL , E = V IL , and PGM = V IH . Figure 11 shows the timing for the program and verify operation. Start Address = First Lo...
Page 63 - Table 6. TMS320E25 Protect and Verify EPROM Mode Levels; EPROM protect
TMS320E25 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 63 Table 6. TMS320E25 Protect and Verify EPROM Mode Levels SIGNAL † TMS320E25 PIN TMS27C64 PIN ROM PROTECT PROTECT VERIFY E 22 20 VIH VIL G 42 22 VIH VIL PGM 41 27 VIH VIH VPP 25 1 VPP VCC VCC 61,35 28 ...
Page 65 - Figure 13. EPROM Protect Timing
TMS320E25 SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 65 Protect Verify VPP VCC VIH/VOH VIL/VOL VIH VIL VIH VIL VCC + 1 VCC VPP VSS VIH VIL A4 Q8 VPP VCC E G VIH VIL VIH VIL A6 EPT PGM HI-Z HI-Z HI-Z Figure 13. EPROM Protect Timing ADV ANCE INFORMA TION
Page 66 - INDEX
INDEX TMS320 SECOND-GENERATIONDEVICES SPRS010B — MAY 1987 — REVISED NOVEMBER 1990 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 66 ADV ANCE INFORMA TION
Page 68 - PACKAGING INFORMATION; PACKAGE OPTION ADDENDUM
PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) TMS320C25FNA NRND PLCC FN 68 18 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR TMS320C25FNAR NRND PLCC FN 68 TBD Call TI Call TI TMS320C25FNL NRN...
Page 69 - IMPORTANT NOTICE
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. Customers shouldobtain the l...