NEC 30500A - Manuals

NEC 30500A – Manual in PDF format online.

Manuals:

Manual

Manual NEC 30500A

Summary

Page 2 - Note; MAIN DIFFERENCES BETWEEN V; Notes 1. Under development

µ PD30500, 30500A, 30500B 2 Data Sheet U12031EJ3V0DS00 APPLICATIONS • High-performance embedded systems • Multimedia systems • Entry-class computers • Image processing systems ORDERING INFORMATION Part number Package Maximum operating frequency (MHz) µ PD30500RJ-150 223-pin ceramic PGA (48 × 48 mm) ...

Page 3 - PIN CONFIGURATION; Index mark

µ PD30500, 30500A, 30500B 3 Data Sheet U12031EJ3V0DS00 PIN CONFIGURATION • 223-pin ceramic PGA (48 × 48 mm) µ PD30500RJ-150 µ PD30500RJ-180 µ PD30500RJ-200 181716151413121110987654321 A B C D E F G H J K L M N P R T U V V U T R P N M L K J H G F E D C B A Index mark Bottom View Top View

Page 5 - Bottom View; Under development

µ PD30500, 30500A, 30500B 5 Data Sheet U12031EJ3V0DS00 • 272-pin plastic BGA (29 × 29 mm) µ PD30500S2-150 µ PD30500S2-180 µ PD30500S2-200 µ PD30500AS2-200 Note µ PD30500AS2-250 Note µ PD30500BS2-250 Note µ PD30500BS2-300 Note Bottom View Top View 212019181716151413121110987654321 AA Y W V U T R P N ...

Page 8 - PIN NAMES

µ PD30500, 30500A, 30500B 8 Data Sheet U12031EJ3V0DS00 PIN NAMES BigEndian : Endian Mode Select ColdReset : Cold Reset ExtRqst : External Request GND : Ground GNDP : Quiet GND for PLL Int (0:5) : Interrupt Request ModeClock : Boot Mode Clock Modeln : Boot Mode Data In NC : No Connection NMI : Non-ma...

Page 9 - INTERNAL BLOCK DIAGRAM

µ PD30500, 30500A, 30500B 9 Data Sheet U12031EJ3V0DS00 INTERNAL BLOCK DIAGRAM Data, address System interface Control Clockgenerator SysClock Instruction cache Data cache Instruction address Pipeline control CP0 TLB Execution unit Floating-point unit

Page 10 - PIN FUNCTIONS

µ PD30500, 30500A, 30500B 10 Data Sheet U12031EJ3V0DS00 PIN FUNCTIONS Pin Name I/O Function SysAD (0:63) I/O System address/data bus. 64-bit bus for communication between processor, secondary cache and external agent. SysADC (0:7) I/O System address/data check bus. 8-bit bus including check bits for...

Page 11 - IO is only for V

µ PD30500, 30500A, 30500B 11 Data Sheet U12031EJ3V0DS00 Pin Name I/O Function Int (0:5) Input Interrupt. General-purpose processor interrupt requests whose input statuses can be confirmed by bits 15 through 10 of cause register. NMI Input Non-maskable interrupt. Interrupt request that cannot be mask...

Page 12 - ELECTRICAL SPECIFICATIONS; The upper limit of the input voltage (V

µ PD30500, 30500A, 30500B 12 Data Sheet U12031EJ3V0DS00 ELECTRICAL SPECIFICATIONS (1) µ PD30500 Absolute Maximum Ratings Parameter Symbol Condition Rating Unit Supply voltage V DD –0.5 to +4.0 V Input voltage Note V I –0.5 to V DD + 0.3 V Pulse of less than 10 ns –1.5 to V DD + 0.3 V Operating case ...

Page 13 - Clock parameter; 000 is guaranteed only when the PLL is operating

µ PD30500, 30500A, 30500B 13 Data Sheet U12031EJ3V0DS00 Capacitance Parameter Symbol Condition MIN. MAX. Unit Input capacitance C In 5 pF Output capacitance C out 7 pF AC Characteristics (T C = 0 to +70 ° C (PGA Package), T C = 0 to +85 ° C (BGA Package), V DD = 3.3 V ± 5 %) Clock parameter Paramete...

Page 16 - 000A is guaranteed only when the PLL is operating

µ PD30500, 30500A, 30500B 16 Data Sheet U12031EJ3V0DS00 Capacitance Parameter Symbol Condition MIN. MAX. Unit Input capacitance C In 5 pF Output capacitance C out 7 pF AC Characteristics (T C = 0 to +85 ° C, V DD IO = 3.3 V ± 5 %, V DD = 2.5 V ± 5 %) Clock parameter Parameter Symbol Condition MIN. M...

Page 17 - Two kinds of power sources are provided with the V

µ PD30500, 30500A, 30500B 17 Data Sheet U12031EJ3V0DS00 System Interface Parameter Parameter Symbol Condition MIN. MAX. Unit Data output hold time t DM Modebit (14 : 13) = 10 1.3 ns Modebit (14 : 13) = 11 1.4 ns Modebit (14 : 13) = 00 1.5 ns Modebit (14 : 13) = 01 1.5 ns Data output delay time t DO ...

Page 19 - 000B is guaranteed only when the PLL is operating

µ PD30500, 30500A, 30500B 19 Data Sheet U12031EJ3V0DS00 Capacitance Parameter Symbol Condition MIN. MAX. Unit Input capacitance C In 5 pF Output capacitance C out 7 pF AC Characteristics (T C = 0 to +85 ° C, V DD IO = 3.3 V ± 5 %, V DD = 1.8 V ± 0.1 V) Clock parameter Parameter Symbol Condition MIN....

Page 21 - Test Condition; Test Load; Timing Chart; SysClock; Mode clock timing; ModeClock

µ PD30500, 30500A, 30500B 21 Data Sheet U12031EJ3V0DS00 Test Condition t DO 50 % 50 % SysClock All output pins t DM Test Load All output pins DUT C L = 50 pF Timing Chart Clock timing t CP t CH t CL 50 % SysClock t CR t CF 80 % 20 % Mode clock timing t MOC 50 % ModeClock

Page 22 - Clock jitter; System interface edge timing

µ PD30500, 30500A, 30500B 22 Data Sheet U12031EJ3V0DS00 Clock jitter t ji 50 % t ji SysClock System interface edge timing t DO t DH t DH Output Output Output Output Input Input t DO t DM t DM t DS t DS SysClock SysAD (0 : 63), SysADC (0 : 7), SysCmd (0 : 8), SysCmdP, ScLine (0 : 15), ScWord (0 : 1),...

Page 25 - Warm reset timing; IO; Ok

µ PD30500, 30500A, 30500B 25 Data Sheet U12031EJ3V0DS00 Warm reset timing H V DD IO Note ≥ 64 SysClock SysClock V DD Ok ColdReset Reset t DS t DS H V DD H H Note V R 5000A, V R 5000B only

Page 26 - PACKAGE DRAWING; Index Mark; NOTE; T S R Q P N M L K J H G F E D C B A

µ PD30500, 30500A, 30500B 26 Data Sheet U12031EJ3V0DS00 PACKAGE DRAWING F φ M M L H G J E Index Mark X223RJ-100A-1 I T E M M I L L I M E T E R S I N C H E S A D E F G H 4 7 . 2 4 ± 0 . 2 5 2 . 0 3 2 . 5 4 ( T . P . ) J 3 . 9 8 M A X . 0 . 5 0 M I N . 3 . 3 0 ± 0 . 2 K 1 . 8 6 0 ± 0 . 0 1 0 0 . 0 8 0...

Page 27 - N O T E S; Controlling dimension millimeter.

µ PD30500, 30500A, 30500B 27 Data Sheet U12031EJ3V0DS00 Each ball centerline is located within 0.30 mm ofits true position (T.P.) at maximum material condition. Each ball centerline is located within 0.10 mm ofits true position (T.P.) at maximum material condition. K S F L M S *2 S *3 A B M P M φ φ ...

Page 28 - RECOMMENDED SOLDERING CONDITIONS; (1) Soldering Conditions of Surface Mount Type

µ PD30500, 30500A, 30500B 28 Data Sheet U12031EJ3V0DS00 RECOMMENDED SOLDERING CONDITIONS Soldering this product under the following soldering conditions is recommended. For the details of the recommended soldering conditions, refer to Information Document Semiconductor Device Mounting Technology Man...

Page 29 - DIFFERENCES BETWEEN THE V; TM

µ PD30500, 30500A, 30500B 29 Data Sheet U12031EJ3V0DS00 DIFFERENCES BETWEEN THE V R 5000 AND V R 4310 TM Item V R 5000 V R 4310 Operating frequency Internal 200 MHz MAX. 167 MHz MAX. External 100 MHz MAX. 83.3 MHz MAX. Pipeline 2-way super scalar 5-stage 5-stage pipeline pipeline Cache Primary instr...

Page 30 - NOTES FOR CMOS DEVICES; PRECAUTION AGAINST ESD FOR SEMICONDUCTORS; to be taken for PW boards with semiconductor devices on it.; HANDLING OF UNUSED INPUT PINS FOR CMOS; pin should be connected to V; or GND with a resistor, if it is considered to have a possibility of; STATUS BEFORE INITIALIZATION OF MOS DEVICES; having reset function.; Series are trademarks of NEC Corp.

µ PD30500, 30500A, 30500B 30 Data Sheet U12031EJ3V0DS00 NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop gener...

Page 31 - Regional Information; • Device availability

µ PD30500, 30500A, 30500B 31 Data Sheet U12031EJ3V0DS00 NEC Electronics Inc. (U.S.) Santa Clara, CaliforniaTel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288 NEC Electronics (Germany) GmbH Duesseldorf, GermanyTel: 0211-65 03 02Fax: 0211-65 03 490 NEC Electronics (UK) Ltd. Milton Keynes, U...