Analog Devices ADSP-2186 - Manuals

Analog Devices ADSP-2186 – Manual in PDF format online.

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Manual

Manual Analog Devices ADSP-2186

Summary

Page 2 - Figure 1. Block Diagram

ADSP-2186 – 2 – REV. 0 biased rounding, result free ALU operations, I/O memory trans-fers and global interrupt masking for increased flexibility. Fabricated in a high speed, double metal, low power, CMOSprocess, the ADSP-2186 operates with a 30 ns instruction cycletime. Every instruction can execute...

Page 4 - NOTES

ADSP-2186 – 4 – REV. 0 concurrently on multiplexed pins. In cases where pin func-tionality is reconfigurable, the default state is shown in plaintext; alternate functionality is shown in italics. Common-Mode Pins # Input/ Pin of Out- Name(s) Pins put Function RESET 1 I Processor Reset Input BR 1 I B...

Page 5 - Source Of Interrupt; IRQE

ADSP-2186 – 5 – REV. 0 To minimize power consumption during power-down, configurethe programmable flag as an output when connected to a three-stated buffer. This ensures that the pin will be held at a constantlevel and not oscillate should the three-state driver’s level hoveraround the logic switchi...

Page 6 - Figure 2. Basic System Configuration

ADSP-2186 – 6 – REV. 0 Idle When the ADSP-2186 is in the Idle Mode, the processor waitsindefinitely in a low power state until an interrupt occurs. Whenan unmasked interrupt occurs, it is serviced; execution thencontinues with the instruction following the IDLE instruction.In Idle mode IDMA, BDMA an...

Page 7 - Clock Signals; DSP; Figure 3. External Crystal Connections; Reset; MEMORY ARCHITECTURE; EXTERNAL 8K

ADSP-2186 – 7 – REV. 0 Clock Signals The ADSP-2186 can be clocked by either a crystal or a TTL-compatible clock signal. The CLKIN input cannot be halted, changed during operationor operated below the specified frequency during normal opera-tion. The only exception is while the processor is in the po...

Page 8 - RESERVED; Data Memory; Figure 6. Data Memory; DMOVLAY Memory; Composite Memory Select (

ADSP-2186 – 8 – REV. 0 There are 8K words of memory accessible internally when thePMOVLAY register is set to 0. When PMOVLAY is set to some-thing other than 0, external accesses occur at addresses 0x2000through 0x3FFF. The external address is generated as shown inTable II. Table II. PMOVLAY Memory A...

Page 9 - Byte Memory; Internal; IS

ADSP-2186 – 9 – REV. 0 Byte Memory The byte memory space is a bidirectional, 8-bit-wide, externalmemory space used to store programs and data. Byte memory isaccessed using the BDMA feature. The byte memory spaceconsists of 256 pages, each of which is 16K × 8. The byte memory space on the ADSP-2186 s...

Page 10 - MODE C MODE B MODE A Booting Method; IDMA Port Booting

ADSP-2186 – 1 0 – REV. 0 Bootstrap Loading (Booting) The ADSP-2186 has two mechanisms to allow automatic load-ing of the internal program memory after reset. The method forbooting is controlled by the Mode A, B and C configuration bitsas shown in Table VI. These four states can be compressed intotwo...

Page 12 - Target Board Connector for EZ-ICE; GND; Figure 7. Target Board Connector for EZ-ICE; Target Memory Interface

ADSP-2186 – 1 2 – REV. 0 The EZ-ICE ® * connects to your target system via a ribbon cable and a 14-pin female plug. The female plug is plugged onto the14-pin connector (a pin strip header) on the target board. Target Board Connector for EZ-ICE ® * Probe The EZ-ICE ® * connector (a standard pin strip...

Page 13 - Guaranteed but not tested.; Applies to TQFP package type.

– 1 3 – REV. 0 ADSP-2186 RECOMMENDED OPERATING CONDITIONS K Grade B Grade Parameter Min Max Min Max Unit V DD 4.5 5.5 4.5 5.5 V T AMB 0 +70 –40 +85 ° C ELECTRICAL CHARACTERISTICS K/B Grades Parameter Test Conditions Min Typ Max Unit V IH Hi-Level Input Voltage 1, 2 @ V DD = max 2.0 V V IH Hi-Level C...

Page 14 - ABSOLUTE MAXIMUM RATINGS*; ADSP-2186 TIMING PARAMETERS; GENERAL NOTES; MEMORY TIMING SPECIFICATIONS; xMS

ADSP-2186 – 1 4 – REV. 0 ESD SENSITIVITYThe ADSP-2186 is an ESD (electrostatic discharge) sensitive device. Electrostatic charges readilyaccumulate on the human body and equipment and can discharge without detection. Permanentdamage may occur to devices subjected to high energy electrostatic dischar...

Page 15 - ENVIRONMENTAL CONDITIONS; Package; POWER DISSIPATION; Example; DMS; n MODES

ADSP-2186 – 1 5 – REV. 0 ENVIRONMENTAL CONDITIONS Ambient Temperature Rating: T AMB = T CASE – (PD x θ CA ) T CASE = Case Temperature in ° C PD = Power Dissipation in W θ CA = Thermal Resistance (Case-to-Ambient) θ JA = Thermal Resistance (Junction-to-Ambient) θ JC = Thermal Resistance (Junction-to-...

Page 16 - CAPACITIVE LOADING; (at Maximum Ambient Operating Temperature); (at Maximum Ambient Operating; ) is the difference of t; from which

ADSP-2186 – 1 6 – REV. 0 CAPACITIVE LOADING Figures 9 and 10 show the capacitive loading characteristics ofthe ADSP-2186. C L – pF RISE TIME (0.4V – 2.4V ) – ns 30 300 0 50 100 150 200 250 25 15 10 5 0 20 T = +85 ° C V DD = 4.5V Figure 9. Typical Output Rise Time vs. Load Capacitance,C L (at Maximum...

Page 17 - TIMING PARAMETERS; RESET; Figure 14. Clock Signals

ADSP-2186 REV. 0 – 1 7 – TIMING PARAMETERS Parameter Min Max Unit Clock Signals and Reset Timing Requirements:t CKI CLKIN Period 60 [50] 150 ns t CKIL CLKIN Width Low 20 ns t CKIH CLKIN Width High 20 ns Switching Characteristics:t CKL CLKOUT Width Low 0.5 t CK – 7 ns t CKH CLKOUT Width High 0.5 t CK...

Page 18 - Parameter; and t; IRQx; Figure 15. Interrupts and Flags

ADSP-2186 REV. 0 – 1 8 – TIMING PARAMETERS Parameter Min Max Unit Interrupts and Flag Timing Requirements:t IFS IRQx , FI, or PFx Setup before CLKOUT Low 1, 2, 3, 4 0.25 t CK + 15 ns t IFH IRQx , FI, or PFx Hold after CLKOUT High 1, 2, 3, 4 0.25 t CK ns Switching Characteristics:t FOH Flag Output Ho...

Page 19 - Figure 16. Bus Request–Bus Grant

ADSP-2186 REV. 0 – 1 9 – Parameter Min Max Unit Bus Request/Grant Timing Requirements:t BH BR Hold after CLKOUT High 1 0.25 t CK + 2 ns t BS BR Setup before CLKOUT Low 1 0.25 t CK + 17 ns Switching Characteristics:t SD CLKOUT High to xMS , RD , WR Disable 0.25 t CK + 10 ns t SDB xMS , RD , WR Disabl...

Page 20 - Figure 17. Memory Read

ADSP-2186 REV. 0 – 2 0 – TIMING PARAMETERS Parameter Min Max Unit Memory Read Timing Requirements:t RDD RD Low to Data Valid 0.5 t CK – 9 + w ns t AA A0–A13, xMS to Data Valid 0.75 t CK – 10.5 + w ns t RDH Data Hold from RD High 0 ns Switching Characteristics:t RP RD Pulse Width 0.5 t CK – 5 + w ns ...

Page 21 - Figure 18. Memory Write

ADSP-2186 REV. 0 – 2 1 – Parameter Min Max Unit Memory Write Switching Characteristics:t DW Data Setup before WR High 0.5 t CK – 7+ w ns t DH Data Hold after WR High 0.25 t CK – 2 ns t WP WR Pulse Width 0.5 t CK – 5 + w ns t WDE WR Low to Data Enabled 0 ns t ASW A0-A13, xMS Setup before WR Low 0.25 ...

Page 22 - Figure 19. Serial Ports

ADSP-2186 REV. 0 – 2 2 – TIMING PARAMETERS Parameter Min Max Unit Serial Ports Timing Requirements:t SCK SCLK Period 50 ns t SCS DR/TFS/RFS Setup before SCLK Low 4 ns t SCH DR/TFS/RFS Hold after SCLK Low 7 ns t SCP SCLK IN Width 20 ns Switching Characteristics:t CC CLKOUT High to SCLK OUT 0.25 t CK ...

Page 23 - IACK; Figure 20. IDMA Address Latch

ADSP-2186 REV. 0 – 2 3 – Parameter Min Max Unit IDMA Address Latch Timing Requirements:t IALP Duration of Address Latch 1, 3 10 ns t IASU IAD15–0 Address Setup before Address Latch End 3 5 ns t IAH IAD15–0 Address Hold after Address Latch End 3 2 ns t IKA IACK Low before Start of Address Latch 2, 3 ...

Page 28 - 00-Lead TQFP Package Pinout

ADSP-2186 REV. 0 – 2 8 – 100-Lead TQFP Package Pinout 5 4 3 2 7 6 9 8 1 D19 D18 D17 D16 IRQE +PF4 IRQL0 +PF5 GND IRQL1 +PF6 DT0 TFS0 SCLK0 VDD DT1 TFS1 RFS1 DR1 GND SCLK1 ERESET RESET D15 D14 D13 D12 GND D11 D10 D9 VDD GND D8 D7/ IWR D6/ IRD D5/ IAL D4/ IS GND VDD D3/ IACK D2/IAD15 D1/IAD14 D0/IAD13...

Page 29 - TQFP Pin Configurations; EINT

ADSP-2186 REV. 0 – 2 9 – TQFP Pin Configurations TQFP Pin TQFP Pin TQFP Pin TQFP Pin Number Name Number Name Number Name Number Name 1 A4/IAD3 26 IRQE + PF4 51 EBR 76 D16 2 A5/IAD4 27 IRQL0 + PF5 52 BR 77 D17 3 GND 28 GND 53 EBG 78 D18 4 A6/IAD5 29 IRQL1 + PF6 54 BG 79 D19 5 A7/IAD6 30 IRQ2 + PF7 55...