Page 2 - Revision History
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com UG129 (v1.1.2) June 24, 2008 Xilinx is disclosing this Document and Intellectual Property (hereinafter “the Design”) to you for use in the development of designs to operate on, or interface with Xilinx FPGAs. Except as stated herein, none of th...
Page 3 - Preface; Limitations; Limited Warranty and Disclaimer
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 3 UG129 (v1.1.2) June 24, 2008 R Preface Limitations Limited Warranty and Disclaimer These designs are provided to you “as-is”. Xilinx and its licensors make and you receive no warranties or conditions, express, implied, statutory or otherwise,...
Page 4 - Acknowledgments
4 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Preface: Acknowledgments R Acknowledgments Xilinx thanks the following individuals for their contribution to the PicoBlaze microcontroller cause: • Henk van Kampen, Mediatronix Developer of the pBlazIDE graphical,...
Page 5 - About This Guide; Guide Contents
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 5 UG129 (v1.1.2) June 24, 2008 Guide Contents R About This Guide The PicoBlaze™ embedded microcontroller is an efficient, cost-effective embedded processor core for Spartan ® -3, Virtex ® -II, and Virtex-II Pro FPGAs. This user guide describes ...
Page 7 - Preface: Limitations; Table of Contents
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 7 UG129 (v1.1.2) June 24, 2008 Preface: Limitations Limited Warranty and Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limitation of Liability . . . . . . . . . . . . . . . . . . . . . . . ...
Page 8 - Chapter 4: Interrupts
8 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 R Increment/Decrement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Negate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....
Page 9 - Chapter 8: Performance
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 9 UG129 (v1.1.2) June 24, 2008 R Chapter 8: Performance Input Clock Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Predicting Executing Performance . . . . . . . . . . . ...
Page 10 - Appendix A: Related Materials and References
10 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 R Appendix A: Related Materials and References Appendix B: Example Program Templates KCPSM3 Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....
Page 11 - Chapter 1; Introduction; PicoBlaze Microcontroller Features
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 11 UG129 (v1.1.2) June 24, 2008 R Chapter 1 Introduction The PicoBlaze™ microcontroller is a compact, capable, and cost-effective fully embedded 8-bit RISC microcontroller core optimized for the Spartan ® -3, Virtex ® -II, and Virtex-II Pro FPG...
Page 12 - PicoBlaze Microcontroller Functional Blocks; General-Purpose Registers
12 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 1: Introduction R • Byte-wide Arithmetic Logic Unit (ALU) with CARRY and ZERO indicator flags • 64-byte internal scratchpad RAM • 256 input and 256 output ports for easy expansion and enhancement • Automa...
Page 14 - Program Flow Control
14 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 1: Introduction R Program Counter (PC) The Program Counter (PC) points to the next instruction to be executed. By default, the PC automatically increments to the next instruction location when executing a...
Page 15 - Why the PicoBlaze Microcontroller?
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 15 UG129 (v1.1.2) June 24, 2008 Why the PicoBlaze Microcontroller? R The data registers and scratchpad RAM are not affected by Reset. See “RESET Event” in Appendix C for more information. Why the PicoBlaze Microcontroller? There are literally d...
Page 17 - Chapter 2; PicoBlaze Interface Signals; PicoBlaze Microcontroller
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 17 UG129 (v1.1.2) June 24, 2008 R Chapter 2 PicoBlaze Interface Signals The top-level interface signals to the PicoBlaze™ microcontroller appear in Figure 2-1 and are described in Table 2-1 . Figure 7-1 provides additional detail on the interna...
Page 19 - Chapter 3; PicoBlaze Instruction Set
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 19 UG129 (v1.1.2) June 24, 2008 R Chapter 3 PicoBlaze Instruction Set Table 3-1 summarizes the entire PicoBlaze™ processor instruction set, which appears alphabetically. Instructions are listed using the KCPSM3 syntax. If different, the pBlazID...
Page 22 - Address Spaces
22 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 3: PicoBlaze Instruction Set R Address Spaces As shown in Table 3-2 , the PicoBlaze microcontroller has five distinct address spaces. Specific instructions operate on each of the address spaces. TEST sX, ...
Page 24 - Processing Data; Logic Instructions
24 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 3: PicoBlaze Instruction Set R Processing Data All data processing instructions operate on any of the 16 general-purpose registers. Only the data processing instructions modify the ZERO or CARRY flags as ...
Page 25 - Complement/Invert Register
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 25 UG129 (v1.1.2) June 24, 2008 Processing Data R Complement/Invert Register The PicoBlaze microcontroller does not have a specific instruction to invert individual bits within register sX . However, the XOR sX,FF instruction performs the equiv...
Page 26 - Clear Bit; Arithmetic Instructions; ADD and ADDCY Add Instructions
26 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 3: PicoBlaze Instruction Set R operation. ORing register sX with a bit mask sets specific bits, as shown in Figure 3-6 . A ‘1’ in the bit mask sets the corresponding bit in register sX . A ‘0’ in the bit ...
Page 27 - SUB and SUBCY Subtract Instructions
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 27 UG129 (v1.1.2) June 24, 2008 Processing Data R See also: • “ADD sX, Operand —Add Operand to Register sX,” page 91 • “ADDCY sX, Operand —Add Operand to Register sX with Carry,” page 92 SUB and SUBCY Subtract Instructions The PicoBlaze microco...
Page 28 - Negate; Multiplication
28 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 3: PicoBlaze Instruction Set R If incrementing or decrementing a multi-register value—i.e., a 16-bit value—perform the operation using multiple instructions. Incrementing or decrementing a multi-byte valu...
Page 30 - Division
30 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 3: PicoBlaze Instruction Set R Division The PicoBlaze microcontroller core does not have a dedicated hardware divider. However, the PicoBlaze microcontroller performs division using the available arithmet...
Page 32 - Setting and Clearing CARRY Flag; Clear CARRY Flag; Test and Compare
32 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 3: PicoBlaze Instruction Set R A similar NOP technique is to simply jump to the next instruction, which is equivalent to the default program flow. The JUMP instruction consumes an instruction cycle (two c...
Page 34 - Compare; Shift and Rotate Instructions; Shift
34 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 3: PicoBlaze Instruction Set R The example in Figure 3-25 demonstrates how to generate parity for all eight bits in a register. See also “TEST sX, Operand — Test Bit Location in Register sX, Generate Odd ...
Page 35 - Rotate
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 35 UG129 (v1.1.2) June 24, 2008 Processing Data R See also: • “SL[ 0 | 1 | X | A ] sX — Shift Left Register sX,” page 109 • “SR[ 0 | 1 | X | A ] sX — Shift Right Register sX,” page 110 Rotate The rotate instructions, shown in Table 3-5 , rotate...
Page 36 - Moving Data
36 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 3: PicoBlaze Instruction Set R Moving Data Data movement between various resources is an essential microcontroller function. Figure 3-26 shows the various PicoBlaze instructions to move data. The LOAD sX,...
Page 41 - Chapter 4; Interrupts
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 41 UG129 (v1.1.2) June 24, 2008 R Chapter 4 Interrupts The PicoBlaze™ processor provides a single interrupt input signal. If the application requires multiple interrupt signals, combine the signals using simple FPGA logic to form a single INTER...
Page 43 - CLK
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 43 UG129 (v1.1.2) June 24, 2008 Example Interrupt Flow R 3. The PicoBlaze microcontroller recognizes the interrupt and preempts the ADD s0,s1 instruction. The current PC, which points to the ADD s0 s1 instruction, is pushed onto the CALL/RETURN...
Page 45 - Chapter 5; Scratchpad RAM; Address Modes; Direct Addressing; Indirect Addressing
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 45 UG129 (v1.1.2) June 24, 2008 R Chapter 5 Scratchpad RAM The PicoBlaze™ microcontroller contains a 64-byte scratchpad RAM. Two instructions, STORE and FETCH , move data between any data register and the scratchpad RAM. Both direct and indirec...
Page 46 - Implementing a Look-Up Table
46 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 5: Scratchpad RAM R Implementing a Look-Up Table The next few examples demonstrate both the flexibility of the scratchpad RAM and indirect addressing. The example code in Figure 5-3 uses Scratchpad RAM as...
Page 47 - Stack Operations
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 47 UG129 (v1.1.2) June 24, 2008 Stack Operations R Stack Operations Although the PicoBlaze microcontroller has a CALL/RETURN stack, it does not have a dedicated data stack. In some controller architectures, register values are preserved during ...
Page 49 - Chapter 6; Input and Output Ports
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 49 UG129 (v1.1.2) June 24, 2008 R Chapter 6 Input and Output Ports The PicoBlaze™ microcontroller supports up to 256 input ports and 256 output ports that can also be combined to create input/output ports. The interface signals from Figure 2-1 ...
Page 50 - INPUT Operations; FPGA Logic
50 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 6: Input and Output Ports R INPUT Operations An INPUT operation transfers the data supplied on the IN_PORT input port to any one of the 16 data registers, defined by register sX , as shown in Figure 6-1 ....
Page 52 - Applications with Few Input Sources
52 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 6: Input and Output Ports R Failure to include a register anywhere in the path from PORT_ID to IN_PORT is the most common reason for decreased system clock rates. Consequently, make sure that this path is...
Page 53 - OUTPUT Operations
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 53 UG129 (v1.1.2) June 24, 2008 OUTPUT Operations R OUTPUT Operations As shown in Figure 6-5 , an OUTPUT operation presents the contents of any of the 16 registers to the OUT_PORT output port. The PORT_ID output port, defined either by register...
Page 54 - Simple Output Structure for Few Output Destinations
54 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 6: Input and Output Ports R Simple Output Structure for Few Output Destinations For eight or less simple output ports, use “one-hot” port addresses and only decode the appropriate PORT_ID signal, as shown...
Page 56 - Pipelining for Maximum Performance
56 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 6: Input and Output Ports R Pipelining for Maximum Performance In most applications, the PicoBlaze microcontroller has more than sufficient performance to meet application requirements. However, PicoBlaze...
Page 58 - Repartitioning the Design for Maximum Performance
58 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 6: Input and Output Ports R Repartitioning the Design for Maximum Performance Another approach to maximizing performance is to re-evaluate the system requirements. If the number of I/O ports is the bottle...
Page 59 - Chapter 7; Instruction Storage Configurations; Standard Configuration – Single 1Kx18 Block RAM; Instruction ROM
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 59 UG129 (v1.1.2) June 24, 2008 R Chapter 7 Instruction Storage Configurations The PicoBlaze™ microcontroller executes code from memory resources embedded within the FPGA. Figure 7-1 shows that the PicoBlaze microcontroller actually consists of...
Page 60 - Standard Configuration with UART or JTAG Programming Interface; Block RAM
60 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 7: Instruction Storage Configurations R Standard Configuration with UART or JTAG Programming Interface The second read/write port on the block RAM provides a convenient means to update the PicoBlaze instr...
Page 61 - Distributed ROM Instead of Block RAM; Distributed ROM
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 61 UG129 (v1.1.2) June 24, 2008 Two PicoBlaze Microcontrollers with Separate 512x18 Code Images in a Block RAM R Two PicoBlaze Microcontrollers with Separate 512x18 Code Images in a Block RAM Two PicoBlaze microcontrollers can also share a sing...
Page 63 - Chapter 8; Performance; Input Clock Frequency; Predicting Executing Performance
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 63 UG129 (v1.1.2) June 24, 2008 R Chapter 8 Performance Input Clock Frequency Table 8-1 shows the maximum available performance for the PicoBlaze™ microcontroller using various FPGA families and speed grades. The Virtex ® -II and Virtex-II Pro ...
Page 65 - Chapter 9; PicoBlaze Development Tools; Assembler
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 65 UG129 (v1.1.2) June 24, 2008 R Chapter 9 PicoBlaze Development Tools There are three primary development environments for creating PicoBlaze™ processor application code, as summarized in Table 9-1 . Xilinx offers two PicoBlaze environments. ...
Page 66 - Assembly Errors
66 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 9: PicoBlaze Development Tools R Open a DOS box and navigate to the working directory. To assemble the PicoBlaze program, type: kcpsm3 <filename>[.psm] Assembly Errors The assembler halts as soon as...
Page 67 - Mediatronix pBlazIDE; Configuring pBlazIDE for the PicoBlaze Microcontroller
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 67 UG129 (v1.1.2) June 24, 2008 Mediatronix pBlazIDE R The assembler also produces a log file plus files that show the assignments for various labels and constants found in the source code. The log file shows the instruction address, the opcode...
Page 68 - Importing KCPSM3 Code into pBlazIDE
68 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 9: PicoBlaze Development Tools R Importing KCPSM3 Code into pBlazIDE The pBlazIDE syntax and instruction mnemonics are different than the Xilinx KCPSM3 syntax. The pBlazIDE software provides an import fun...
Page 69 - Differences Between the KCPSM3 Assembler and pBlazIDE
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 69 UG129 (v1.1.2) June 24, 2008 Differences Between the KCPSM3 Assembler and pBlazIDE R Differences Between the KCPSM3 Assembler and pBlazIDE Table 9-2 details the differences between the KCPSM3 and pBlazIDE instruction mnemonics. Directives Ta...
Page 71 - VHDL Design Flow; KCPSM3 Module
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 71 UG129 (v1.1.2) June 24, 2008 R Chapter 10 Using the PicoBlaze Microcontroller in an FPGA Design The PicoBlaze™ microcontroller is primarily designed for use in a VHDL design flow. However, both Verilog and black box instantiation are also su...
Page 72 - Connecting the Program ROM
72 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 10: Using the PicoBlaze Microcontroller in an FPGA Design R Connecting the Program ROM The PicoBlaze program ROM is used within a VHDL design flow. The PicoBlaze assembler generates a VHDL file in which a...
Page 73 - Black Box Instantiation of KCPSM3 using KCPSM3.ngc; Generating the Program ROM using prog_rom.coe; Verilog Design Flow
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 73 UG129 (v1.1.2) June 24, 2008 Black Box Instantiation of KCPSM3 using KCPSM3.ngc R Black Box Instantiation of KCPSM3 using KCPSM3.ngc The Xilinx NGC file included with the reference design was generated by synthesizing the KCPSM3.vhd file usi...
Page 75 - Assembler Directives; Locating Code at a Specific Address
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 75 UG129 (v1.1.2) June 24, 2008 R Chapter 11 Assembler Directives Both the KCPSM3 and pBlazIDE assemblers include directives that provide advanced control. Locating Code at a Specific Address In some cases, application code must be assigned to ...
Page 76 - Defining Constants; Naming the Program ROM Output File; pBlazIDE
76 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 11: Assembler Directives R Defining Constants Similar to renaming registers, assign names to constant values. By defining names for constants, it is easier to understand and document the PicoBlaze code ra...
Page 77 - Input Por ts; Output Por ts
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 77 UG129 (v1.1.2) June 24, 2008 Defining I/O Ports (pBlazIDE) R Input Por ts The DSIN directive defines the name and the port address (or port identification number) for a read-only input port. The DSIN directive models an input port that only ...
Page 79 - Custom Instruction Op-Codes
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 79 UG129 (v1.1.2) June 24, 2008 Custom Instruction Op-Codes R During instruction set simulation, pBlazIDE displays the readable output port as shown in Figure 11-8 . The port value can be modified from the graphical interface. Custom Instructio...
Page 81 - Simulating PicoBlaze Code
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 81 UG129 (v1.1.2) June 24, 2008 R Chapter 12 Simulating PicoBlaze Code Various tools support PicoBlaze code simulation, each with distinct strengths and weaknesses as described in Table 12-1 . For example, the pBlazIDE Instruction Set Simulator...
Page 82 - Instruction Set Simulation with pBlazIDE
82 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Chapter 12: Simulating PicoBlaze Code R Furthermore, the pBlazIDE ISS offers full single-step and breakpoint support while viewing the PicoBlaze assembly source code. Evaluate the software timing for end applicat...
Page 83 - Simulator Control Buttons
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 83 UG129 (v1.1.2) June 24, 2008 Instruction Set Simulation with pBlazIDE R Simulator Control Buttons Table 12-2 shows the various pBlazIDE control buttons and describes their functions. Figure 12-1: The pBlazIDE Instruction Set Simulator (ISS) ...
Page 85 - Turbocharging Simulation using FPGAs!
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 85 UG129 (v1.1.2) June 24, 2008 Turbocharging Simulation using FPGAs! R Turbocharging Simulation using FPGAs! Hardware simulators track results with picosecond or nanosecond resolution. In contrast, the PicoBlaze microcontroller is often employ...
Page 87 - Appendix A; Related Materials and References
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 87 UG129 (v1.1.2) June 24, 2008 R Appendix A Related Materials and References This appendix provides links to additional information relevant to a PicoBlaze™ processor design. 1. PicoBlaze 8-bit Embedded Microcontroller Download PicoBlaze refer...
Page 89 - Appendix B; Example Program Templates; KCPSM3 Syntax
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 89 UG129 (v1.1.2) June 24, 2008 R Appendix B Example Program Templates The following code templates provide the basic recommended structure for PicoBlaze™ processor application programs. Both KCPSM3 and pBlazIDE templates are provided. KCPSM3 S...
Page 90 - pBlazIDE Syntax
90 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Appendix : Example Program Templates R pBlazIDE Syntax Figure B-2 provides a code template for creating PicoBlaze applications using the pBlazIDE assembler. Figure B-2: PicoBlaze Application Program Template for ...
Page 91 - Appendix C; ADD sX, Operand —Add Operand to Register sX
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 91 UG129 (v1.1.2) June 24, 2008 R Appendix C PicoBlaze Instruction Set and Event Reference This appendix provides a detailed operational description of each PicoBlaze™ processor instruction and the Interrupt and Reset events, including pseudoco...
Page 92 - ADDCY sX, Operand —Add Operand to Register sX with Carry
92 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Appendix : PicoBlaze Instruction Set and Event Reference R Pseudocode sX Å (sX + Operand) mod 256; always an 8-bit result if ( (sX + Operand) > 255 ) then CARRY Å 1 else CARRY Å 0 endif if ( ((sX + Operand) = ...
Page 96 - COMPARE sX, Operand — Compare Operand with Register sX
96 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Appendix : PicoBlaze Instruction Set and Event Reference R COMPARE sX, Operand — Compare Operand with Register sX The COMPARE instruction performs an 8-bit comparison of two operands, as shown in Figure C-4 . The...
Page 97 - DISABLE INTERRUPT — Disable External Interrupt Input; ENABLE INTERRUPT — Enable External Interrupt Input
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 97 UG129 (v1.1.2) June 24, 2008 DISABLE INTERRUPT — Disable External Interrupt Input R DISABLE INTERRUPT — Disable External Interrupt Input The DISABLE INTERRUPT instruction clears the interrupt enable (IE) flag. Consequently, the PicoBlaze mic...
Page 98 - 4-Byte Scratchpad RAM
98 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Appendix : PicoBlaze Instruction Set and Event Reference R FETCH sX, Operand — Read Scratchpad RAM Location to Register sX The FETCH instruction reads scratchpad RAM location specified by Operand into register sX...
Page 100 - INTERRUPT Event, When Enabled
100 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Appendix : PicoBlaze Instruction Set and Event Reference R INTERRUPT Event, When Enabled The interrupt event is not an instruction but the response of the PicoBlaze microcontroller to an external interrupt input...
Page 102 - LOAD sX, Operand — Load Register sX with Operand
102 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Appendix : PicoBlaze Instruction Set and Event Reference R LOAD sX, Operand — Load Register sX with Operand The LOAD instruction loads the contents of any register. The new value is either the contents of any ot...
Page 103 - OR sX, Operand — Logical Bitwise OR Register sX with Operand
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 103 UG129 (v1.1.2) June 24, 2008 OR sX, Operand — Logical Bitwise OR Register sX with Operand R OR sX, Operand — Logical Bitwise OR Register sX with Operand The OR instruction performs a bitwise logical OR operation between two operands, as sho...
Page 105 - RESET Event
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 105 UG129 (v1.1.2) June 24, 2008 RESET Event R RESET Event The reset event is not an instruction but the response of the PicoBlaze microcontroller when the RESET input is High. A RESET Event restarts the PicoBlaze microcontroller and clears var...
Page 108 - RL sX — Rotate Left Register sX; RR sX — Rotate Right Register sX
108 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller UG129 (v1.1.2) June 24, 2008 Appendix : PicoBlaze Instruction Set and Event Reference R RL sX — Rotate Left Register sX The rotate left instruction operates on any single data register. Each bit in the specified register is shifted left by ...
Page 113 - SUB sX, Operand —Subtract Operand from Register sX
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 113 UG129 (v1.1.2) June 24, 2008 SUB sX, Operand —Subtract Operand from Register sX R The STORE instruction is only supported on PicoBlaze microcontrollers for Spartan-3, Virtex-II, and Virtex-II Pro FPGAs. SUB sX, Operand —Subtract Operand fro...
Page 119 - Appendix D; Instruction Codes
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 119 UG129 (v1.1.2) June 24, 2008 R Appendix D Instruction Codes Table D-1 provides the 18-bit instruction code for every PicoBlaze™ processor instruction. Table D-1: PicoBlaze Instruction Codes Instruction 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 ...
Page 123 - Appendix E
PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 123 UG129 (v1.1.2) June 24, 2008 R Appendix E Register and Scratchpad RAM Planning Worksheets This appendix provides worksheets to plan register assignment and allocation for a PicoBlaze™ processor application. A similar worksheet is also provi...