Texas Instruments PCI1520 - Manual

Texas Instruments PCI1520

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Table of Contents:

  • Page 2 – Document History
  • Page 3 – PCI1520 Typical System Implementation; Typical System Implementation; CardBus Controller Block
  • Page 4 – Power Considerations; Internal Voltage Regulator
  • Page 5 – Power Switch Implementation; pulldown on LATCH is used to indicate to the
  • Page 6 – PCI Bus Interface; IDSEL should be resistively coupled (100
  • Page 7 – PC Card Interface; resistor is recommended. For more information, please see
  • Page 8 – Miscellaneous Pin Interface; Multifunction Terminals; All unused multifunction terminals require a 43k; SPKROUT; pullup
  • Page 9 – Interrupt Configurations; Parallel PCI Interrupts Only
  • Page 10 – Vcc; EEPROM; SCL; Software Considerations; EEPROM Configuration; EEPROM Implementation
  • Page 11 – BIOS Considerations
  • Page 13 – Power Management Considerations; D3 Wake Information
  • Page 16 – pullup resistor. SUSPEND# is an unstandardized method of power; Pin Compatibility with Other Devices
  • Page 17 – Hardware and Pin Assignment Changes
  • Page 18 – Configuration Register Changes
  • Page 19 – Other Functional Differences
  • Page 20 – Hardware and Pin Assignment Changes
  • Page 21 – Configuration Register Changes
  • Page 22 – Reference Schematics; Reference Schematics – Page 1
  • Page 23 – Reference Schematics – Page 2
  • Page 24 – References
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Application Report

SCPA033 - October 2002

1

PCI1520 Implementation Guide

Computer Connectivity Solutions

ABSTRACT

This document is provided to assist platform designers using the PCI1520 dual-socket PC
Card controller.

Detailed information can be found in the PCI1520 data manual.

However, this document provides design suggestions for the various options when
designing in the PCI1520.

Contents

1

PCI1520 Typical System Implementation ....................................................................................................................... 3

2

Power Considerations ...................................................................................................................................................... 4
2.1

Internal Voltage Regulator ........................................................................................................................................ 4

2.2

Clamping Rails .......................................................................................................................................................... 4

2.3

Bypass Capacitors .................................................................................................................................................... 4

3

Power Switch Implementation ......................................................................................................................................... 5

4

PCI Bus Interface .............................................................................................................................................................. 6

5

PC Card Interface.............................................................................................................................................................. 7

6

Miscellaneous Pin Interface............................................................................................................................................. 8
6.1

Multifunction Terminals ............................................................................................................................................. 8

6.2

SPKROUT................................................................................................................................................................. 8

6.3

SUSPEND# ............................................................................................................................................................... 8

7

Interrupt Configurations .................................................................................................................................................. 9
7.1

Parallel PCI Interrupts Only....................................................................................................................................... 9

7.2

Parallel IRQ and Parallel PCI Interrupts .................................................................................................................... 9

7.3

Serial IRQ and Parallel PCI Interrupts....................................................................................................................... 9

7.4

Serial IRQ and Serial PCI Interrupts ......................................................................................................................... 9

8

Software Considerations ............................................................................................................................................... 10
8.1

EEPROM Configuration .......................................................................................................................................... 10

8.2

BIOS Considerations............................................................................................................................................... 11
8.2.1

PCI Configuration Registers (Standard).................................................................................................... 11

8.2.2

PCI Configuration Registers (TI Extension) .............................................................................................. 12

8.2.3

ExCA Compatibility Registers ................................................................................................................... 12

8.2.4

CardBus Socket Registers ........................................................................................................................ 12

9

Power Management Considerations ............................................................................................................................. 13
9.1

D3 Wake Information .............................................................................................................................................. 13
9.1.1

GRST# Only Registers ............................................................................................................................. 14

9.1.2

PME# Context Registers........................................................................................................................... 15

9.2

PME#/RI_OUT# Behavior ....................................................................................................................................... 15

9.3

CLKRUN# Protocol ................................................................................................................................................. 15

9.4

SUSPEND# ............................................................................................................................................................. 16

10

Pin Compatibility with Other Devices ........................................................................................................................... 16

11

Migration to the PCI1520 from the PCI1420.................................................................................................................. 17
11.1 Hardware and Pin Assignment Changes ................................................................................................................ 17
11.2 Configuration Register Changes ............................................................................................................................. 18
11.3 Other Functional Differences .................................................................................................................................. 19

12

Migration to the PCI1420 from the PCI1225.................................................................................................................. 20
12.1 Hardware and Pin Assignment Changes ................................................................................................................ 20
12.2 Configuration Register Changes ............................................................................................................................. 21
12.3 Other Functional Differences .................................................................................................................................. 21

13

Reference Schematics ................................................................................................................................................... 22

14

References ...................................................................................................................................................................... 24

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Summary

Page 2 - Document History

SCPA033 2 PCI1520 Implementation Guide Figures Figure 1. Typical System Implementation .......................................................................................................................3 Figure 2. Power Switch Implementation .........................................................

Page 3 - PCI1520 Typical System Implementation; Typical System Implementation; CardBus Controller Block

SCPA033 PCI1520 Implementation Guide 3 1 PCI1520 Typical System Implementation The figure below represents a typical implementation of the PCI1520 PC Card Controller. Thedevice serves as a bridge between a PCI Bus and a PC Card interface. The PCI1520 willoperate only with the PCI Bus as a primary bu...

Page 4 - Power Considerations; Internal Voltage Regulator

SCPA033 4 PCI1520 Implementation Guide 2 Power Considerations 2.1 Internal Voltage Regulator One of the major differences between the PCI1520 and previous Texas Instruments CardBuscontrollers is that the PCI1520 uses an internal voltage regulator to power the core logic at 2.5V.This allows for a mor...

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