Texas Instruments MSP430x11x1 - Manuals

Texas Instruments MSP430x11x1 – Manual in PDF format online.

Manuals:

Manual

Manual Texas Instruments MSP430x11x1

Summary

Page 2 - functional block diagram

MSP430x11x1MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 AVAILABLE OPTIONS PACKAGED DEVICES TA PLASTIC 20-PIN SOWB (DW) PLASTIC 20-PIN TSSOP (PW) 40 ° C to 85 ° C MSP430C1111IDW MSP430C1121IDW MSP430F1101IPWMSP430F1121IPW – ...

Page 3 - MIXED SIGNAL MICROCONTROLLER; Terminal Functions; TERMINAL; short-form description; processing unit

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions TERMINAL TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION P1.0/TACLK 13 I/O General-purpose digital I/O pin/Timer_A, clock signal TACLK input P1.1...

Page 5 - indirect addressing, ideally suited for computed branches and; operation modes and interrupts; Main system clock MCLK, used by the CPU and system; low-power consumption capabilities; Apply an external clock source.

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 instruction set (continued) Computed branches (BR) and subroutine calls (CALL) instructions use the same addressing modes as the otherinstructions. These addressing m...

Page 6 - status register R2; Reserved For Future

MSP430x11x1MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 status register R2 Reserved For Future Enhancements 15 9 8 7 0 V SCG1 SCG0 OscOff CPUOff GIE N Z C rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 rw-0 6 5 4 3 2 1 The bi...

Page 7 - interrupt vector addresses; INTERRUPT SOURCE

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 interrupt vector addresses The interrupt vectors and the power-up starting address are located in the memory with an address range of0FFFFh-0FFE0h. The vector contain...

Page 8 - special function registers; interrupt enable 1 and 2; Watchdog timer enable signal; interrupt flag register 1 and 2; CC; Flag set on oscillator fault

MSP430x11x1MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 special function registers Most interrupt and module enable bits are collected into the lowest address space. Special function register bitsthat are not allocated to a...

Page 9 - memory organization; functions of the bootstrap loader:; write:; unprotected functions; Read all data in main memory and information memory.

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 memory organization Int. Vector 2 KB ROM 128B RAM 16b Per. 8b Per. SFR FFFFhFFE0h FFDFh F800h 027Fh 0200h 01FFh 0100h 00FFh 0010h 000Fh 0000h MSP430C1111 Int. Vector ...

Page 10 - boot ROM containing bootstrap loader (continued); features of the bootstrap loader are:; TEST PIN

MSP430x11x1MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 boot ROM containing bootstrap loader (continued) features of the bootstrap loader are: D UART communication protocol, fixed to 9600 baud D Port pin P1.1 for transmit,...

Page 11 - TEST; There were less than two positive edges at TEST while RST/NMI is low

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 boot ROM containing bootstrap loader (continued) Program execution begins with the bootstrap vector at 0C00h (boot ROM) if a minimum of two positive edgeshave been a...

Page 12 - flash memory; flash memory control register FCTL1; All control bits are reset during PUC. PUC is active after V; is applied, a reset condition is applied to the

Segment0 w/ Interrupt Vectors 0FFFFh 0FE00h Information Memory Flash Main Memory Segment1 Segment2 Segment3 Segment4 Segment5 Segment6 Segment7 SegmentA SegmentB 0FDFFh 0FC00h 0FBFFh 0FA00h 0F9FFh 0F800h 0F7FFh 0F600h 0F5FFh 0F400h 0F3FFh 0F200h 0F1FFh 0F000h 010FFh 01080h 0107Fh 01000h NOTE: All se...

Page 13 - flash memory control register FCTL1 (continued); flash memory, timing generator, control register FCTL2

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 flash memory control register FCTL1 (continued) Read access is possible at any time without restrictions. The control bits of control register FCTL1 are: SEG WRT FCT...

Page 14 - Read access is possible at any time without restrictions.; Figure 1. Flash Memory Timing Generator Diagram; The control bits are:; flash memory control register FCTL3; There are no restrictions to modify this control register.

MSP430x11x1MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 flash memory, timing generator, control register FCTL2 (continued) The flash timing generator is reset with PUC. It is also reset if the emergency exit bit EMEX is se...

Page 15 - flash memory control register FCTL3 (continued)

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 flash memory control register FCTL3 (continued) BUSY 012Ch, bit0, The BUSY bit shows if an access to the flash memory is allowed (BUSY=0), orif an access violation o...

Page 16 - LOCK; flash memory, interrupt and security key violation

MSP430x11x1MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 flash memory control register FCTL3 (continued) LOCK 012Ch, bit4, The lock bit may be set during any write, segment-erase, or mass-erase request. Any active sequence ...

Page 17 - Figure 2. Block Diagram of NMI Interrupt Sources

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 17 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Flash Module Flash Module Flash Module KEYV System Reset Generator VCC POR PUC WDTQn EQU PUC POR PUC POR NMIRS Clear S WDTIFG IRQ WDTIE Clear IE1.0 PUC POR IRQA TIMS...

Page 19 - Figure 3. Clock Signals; All individual I/O bits are programmable independently.

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 19 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 oscillator and system clock (continued) DIVA XIN LFXT1 OSCILLATOR ACLK OSCOff XTS /1, /2, /4, /8 2 DIVM /1, /2, /4, /8, Off 2 2 SELM CPUOff Auxiliary Clock MCLK Main...

Page 20 - watchdog timer

MSP430x11x1MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 digital I/O (continued) The seven registers are: • Input register 8 bits at port P1/P2 contains information at the pins • Output register 8 bits at port P1/P2 contain...

Page 21 - UART

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 21 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Timer_A (3 capture/compare registers) (continued) P1.1 P1.5 P1.2 P1.6 P2.3 P1.3 P1.7 P2.4 Input Divider CLK 16-Bit Timer SSEL0 SSEL1 TACLK ACLK SMCLK 0 1 2 3 RC INCL...

Page 23 - CAREF

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 23 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Comparator_A (continued) The control bits are: CAOUT, 05Ah, bit0, Comparator output CAF, 05Ah, bit1, The comparator output is transparent or fed through a small filt...

Page 25 - peripheral file map

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 25 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 peripheral file map PERIPHERALS WITH WORD ACCESS Timer_A ReservedReservedReservedReservedCapture/compare registerCapture/compare registerCapture/compare registerTime...

Page 26 - MIN

MSP430x11x1MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings † Voltage applied at V CC to V SS (MSP430C11x1) –0.3 V to 4.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V...

Page 27 - recommended operating conditions (continued); MHz at; VCC – Supply Voltage – V; Figure 6. Frequency vs Supply Voltage

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 27 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (continued) 5 MHz at 2.2 V MSP430x11x1 Devices NOTE: Minimum processor frequency is defined by system clock. Flash program or erase ...

Page 28 - supply current (into V

MSP430x11x1MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended ranges of supply voltage and operating free-airtemperature (unless otherwise noted) supply current (into V CC ) excluding ...

Page 29 - leakage current

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 29 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Schmitt-trigger inputs Port P1 to Port P2; P1.0 to P1.7, P2.0 to P2.5 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIT Positive going input threshold voltage VCC = 2.2...

Page 33 - Figure 9. Block Diagram of Comparator_A Module

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 33 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended ranges of supply voltage and operating free-airtemperature (unless otherwise noted) (continued) _ + CAON 0 1 V+ 0 1 CAF L...

Page 35 - DCO; Frequency V; Figure 13. DCO Characteristics

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 35 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended ranges of supply voltage and operating free-airtemperature (unless otherwise noted) (continued) DCO PARAMETER TEST CONDIT...

Page 36 - principle characteristics of the DCO

MSP430x11x1MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 36 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended ranges of supply voltage and operating free-airtemperature (unless otherwise noted) (continued) principle characteristics ...

Page 37 - APPLICATION INFORMATION

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 37 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION input/output schematic Port P1, P1.0 to P1.3, input/output with Schmitt-trigger EN D (See Note 27) (See Note 28) (See Note 28) (See Note 27) ...

Page 41 - OSC; function for the Basic Clock module

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 41 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Port P2, P2.5, input/output with Schmitt-trigger and R OSC function for the Basic Clock module EN D See Note 27 See Note 28 See Note 28 See Note 27 GND VCC P2.5 0 1 ...

Page 42 - JTAG fuse check mode

MSP430x11x1MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 42 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION Port P2, unbonded bits P2.6 and P2.7 EN D 0 1 0 1 Interrupt Edge Select EN Set Q P2IE.x P2IFG.x P2IRQ.x InterruptFlag P2IES.x P2SEL.x Module X...

Page 43 - MECHANICAL DATA; PLASTIC SMALL-OUTLINE PACKAGE; Seating Plane; DIM; Gage Plane

MSP430x11x1 MIXED SIGNAL MICROCONTROLLER SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000 43 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA DW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 16 PIN SHOWN 4040000 / D 02/98 Seating Plane 0.400 (10,15) 0.419 (10,65) 0.104 (2,65) MAX 1 0.012 (0,30...

Page 45 - IMPORTANT NOTICE; Copyright

IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being r...