Page 3 - Fig. 3 Pin connections – top view; FUNCTIONAL DESCRIPTION; The NWK954 is a mixed-signal CMOS device which; Compliance with Standards; The NWK954 is designed for compliance with the IEEE 802.3; Compatibility With Other Devices; The NWK954 is designed to connect directly to 5 other
NWK954 3 1234567891011121314151617181920212223242526272829303132 9695949392919089888786858483828180797877767574737271706968676665 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 51 62 63 64 IRD3 IRD2 DIGGND2 DIGVDD2 P0_RXLED_N P0_ERLED_N P1_RXLED_N P1_ERLED_N P2_R...
Page 4 - Fig. 4 NWK954 block diagram
NWK954 4 PORT 0 TRANSCEIVER P0_TXOP P0_TXON P0_TXREF P0_RXIP P0_RXIN PORT 1 TRANSCEIVER P1_TXOP P1_TXON P1_TXREF P1_RXIP P1_RXIN PORT 2 TRANSCEIVER P2_TXOP P2_TXON P2_TXREF P2_RXIP P2_RXIN PORT 3 TRANSCEIVER P3_TXOP P3_TXON P3_TXREF P3_RXIP P3_RXIN RESET_N PSEN [1:0] TXCLKIN T A [4:2] VOLTAGE REFERE...
Page 5 - CLOCK
NWK954 5 Basic Repeater Function The Repeater Controller monitors activity on the 4 twisted pair ports and on the Expansion Port. When a packet is receivedon one of the twisted pair ports it is forwarded to the other 3twisted pair ports and to the Expansion Port. When a packet isreceived on the Expa...
Page 6 - Fig. 6 External backplane drivers/receivers
NWK954 6 BPACTIN_ N [7:1] LACTIN_N [5:1] LACTOUT_N BPCOLIN_N BPCOL_N BPCLK IRD [4:0] TXCLKIN BPACTIN_ N [7:1] LACTIN_N [5:1] LACTOUT_N BPCOLIN_N BPCOL_N BPCLK IRD [4:0] TXCLKIN BPACTIN_ N [7:1] LACTIN_N [5:1] LACTOUT_N BPCOLIN_N BPCOL_N BPCLK IRD [4:0] TXCLKIN BPACTIN_ N [7:1] LACTIN_N [5:1] LACTOUT...
Page 7 - LED Drivers; Port status
NWK954 7 The IRD bus in each hub is connected to the 5-bit backplane bus via a bidirectional buffer. This allows data to be driven fromany hub to all other hubs in the stack. The bidirectional buffer iscontrolled by 2 control signals (BPDOE_N and BPDIE_N) whichcan be taken from any one of the NWK954...
Page 8 - Function
NWK954 8 100BASE-TX Receiver The 100BASE-TX receiver recovers data from up to 140m of Cat5 UTP cable. Received data is decoded and descrambledand presented to the repeater controller as 5-bit symbols. TheTransceiver Controller sequences the start-up of the receiverand does not allow data to be passe...
Page 10 - Signal; BPCLK; Type
NWK954 10 Expansion Port (Continued) Signal BPACTIN_N7BPACTIN_N6BPACTIN_N5BPACTIN_N4BPACTIN_N3BPACTIN_N2BPACTIN_N1 BPDIE_N BPDOE_N BPCLK BPCOL_N BPCOLIN_N BPCOLOE_N Type Digital input,no pull-up Standard digitaloutput and digitalinput with pull-up Standard digitaloutput and digitalinput with pull-up...
Page 11 - Table 6; Clocks and Controls; TXCLKIN
NWK954 11 LED Drivers Signal COLLED_N P0_RXLED_N P1_RXLED_N P2_RXLED_N P3_RXLED_N P0_ERLED_N P1_ERLED_N P2_ERLED_N P3_ERLED_N ACTLED_N4ACTLED_N3ACTLED_N2ACTLED_N1ACTLED_N0 Type Standarddigital output Standarddigital output Standarddigital output Standarddigital output Standarddigital output Standard...
Page 14 - AC ELECTRICAL CHARACTERISTICS
NWK954 14 AC ELECTRICAL CHARACTERISTICS Recommended Operating Conditions apply except where otherwise stated TXCLK and RESET_N Typ. Max. TXCLKIN FrequencyDuty cycle RESET_N Pulse width 55 - MHz % ns Units Conditions Characteristic Value 25 ± 100ppm - f TCLK t WRES Symbol Min. 45 100 TXOP/TXON The di...
Page 15 - Fig. 8 External components; MAGNETICS
NWK954 15 Fig. 8 External components 1:1 MAGNETICS VALORST6184 BEL 5558-5999-74 RXON3 RXOP3 RXOC3 TXIP3 TXIN3 TXIC3 TXIC2 TXIN2 TXIP2 RXOC2 RXOP2 RXON2 RXON1 RXOP1 RXOC1 TXIP1 TXIN1 TXIC1 TXIC0 TXIN0 TXIP0 RXOC0 RXOP0 RXON0 C1 C2 R2 R1 R2 R1 R2 R1 R2 R1 C1 C2 C3 C3 R3 R3 R3 R3 C1 C2 R2 R1 R2 R1 C3 C...
Page 16 - PACKAGE DETAILS
NWK954 PACKAGE DETAILS Dimensions are shown thus: mm (in). 31·65/32·15 (1·246/1·266) 3·60/4·00 (0·142/0·157) PIN 1 IDENT PIN 128 27·90/28·10 (1·098/1·106) SQ. 128-LEAD PLASTIC QUAD FLATPACK – GP128 0·13/0·20 (0·005/0·008) 3·35/3·60 (0·132/0·142) 0 ° - 7 ° 24·80 (0·976) NOM. PIN 1 128 LEADS AT 0·80 (...