Intel IQ80960RM - Manuals

IQ80960RM/RN Evaluation Board Manual 1-3 Introduction 1.1 i960 ® RM/RN I/O Processor and IQ80960RM/RN Features The i960 RM/RN I/O processor serves as the main component of a high performance, PCI-based intelligent I/O subsystem. The IQ80960RM and IQ80960RN platforms allow the developer to connect PC...

1-4 IQ80960RM/RN Evaluation Board Manual Introduction 1.3 Tornado* for I20* Software Development Toolset Tornado for I 2 0 is a complete toolset featuring an integrated development environment including a compiler, assembler, linker, and debugger. It also features a real-time operating system. 1.3.1...

IQ80960RM/RN Evaluation Board Manual 1-5 Introduction 1.4 CTOOLS Software Development Toolset Intel’s i960 processor software development toolset, CTOOLS, features advanced C/C++ - language compilers for the i960 processor family. CTOOLS development toolset is available for Windows* 95/NT-based syst...

1-6 IQ80960RM/RN Evaluation Board Manual Introduction Refer to the SPI610 Reference Manual for JTAG emulation system installation and operation for both the Tornado and CTOOLS environment. Optionally, evaluation board serial port communications can be used for this communication link (see Section 1....

IQ80960RM/RN Evaluation Board Manual 1-7 Introduction 1.7 Notational-Conventions The following notation conventions are consistent with other i960 RM/RN I/O processor documentation and general industry standards. 1.8 Technical Support Up-to-date product and technical information is available electro...

1-8 IQ80960RM/RN Evaluation Board Manual Introduction 1.8.1 Intel Customer Electronic Mail Support For direct support from engineers specialing in i960 ® Microprocessor issues send e-mail in english to [email protected]. Questions and other messages may be posted to the Embedded Microprocessor Foru...

IQ80960RM/RN Evaluation Board Manual 1-9 Introduction 1.8.3 Related Information To order printed manuals from Intel, contact your local sales representative or Intel Literature Sales (1-800-548-4725). Contact Cyclone Microsystems for additional information about their products and literature: Table ...

IQ80960RM/RN Evaluation Board Manual 2-1 Getting Started 2 This chapter contains instructions for installing the IQ80960RM/RN platform in a host system and, how to download and execute an application program using Wind River System’s IxWorks ∗ or Intel’s CTOOLS software development toolsets. 2.1 Pre...

2-2 IQ80960RM/RN Evaluation Board Manual Getting Started 2.3 Hardware Installation Follow these instructions to get your new IQ80960RM/RN platform running. Be sure all items on the checklist were provided with your IQ80960RM/RN. Warning: Static charges can severely damage the IQ80960RM/RN platforms....

IQ80960RM/RN Evaluation Board Manual 2-3 Getting Started 4. If you have MON960 installed in the flash ROM, press <ENTER> on a terminal connected to the IQ80960RM/RN platform to bring up the MON960 prompt. MON960 automatically adjusts its baud rate to match that of the terminal at start-up. At ...

IQ80960RM/RN Evaluation Board Manual 3-1 Hardware Reference 3 3.1 Power Requirements The IQ80960RM/RN platform draws power from the PCI bus. The power requirements of the IQ80960RM/RN platforms are shown in Table 3-1 and Table 3-2 . The numbers do not include the power required by a PCI card(s) moun...

3-2 IQ80960RM/RN Evaluation Board Manual Hardware Reference 3.2.1 SDRAM Performance The IQ80960RM/RN platform uses 72-bit SDRAM with ECC or 64-bit SDRAM without ECC. SDRAM allows zero data-to-data wait state operation at 66 MHz. The memory controller unit (MCU) of the i960 ® RM/RN I/O processor supp...

IQ80960RM/RN Evaluation Board Manual 3-3 Hardware Reference 3.2.2 Upgrading SDRAM The IQ80960RM/RN is equipped with 16 Mbytes of SDRAM with ECC inserted in the 168-pin DIMM socket. The memory may be expanded by inserting up to a 128 Mbyte module into the DIMM socket. The various memory combinations ...

3-4 IQ80960RM/RN Evaluation Board Manual Hardware Reference 3.4 Console Serial Port The console serial port on the IQ80960RM/RN platform, based on a 16C550 UART, is capable of operation from 300 to 115,200 bps. The port is connected to a phone jack-style plug on the IQ80960RM/RN platform. The DB25 t...

IQ80960RM/RN Evaluation Board Manual 3-5 Hardware Reference 3.5.2 Interrupt and IDSEL Routing 3.6 Battery Backup Battery backup is provided to save any information in SDRAM during a power failure. The IQ80960RM/RN platform contains four AA NiCd batteries, a charging circuit and a regulator circuit. ...

3-6 IQ80960RM/RN Evaluation Board Manual Hardware Reference 3.8 Logic Analyzer Headers There are five logic analyzer connectors on the IQ80960RM/RN platform. The connectors are Mictor type, AMP part # 767054-1. Hewlett-Packard and Tektronix manufacture and sell interfaces to these connectors. The lo...

IQ80960RM/RN Evaluation Board Manual 3-7 Hardware Reference 3.9 JTAG Header The JTAG header allows debugging hardware to be quickly and easily connected to some of the IQ80960RM/RN processor ’s logic signals. The JTAG header is a 16-pin header. A 3M connector (part number 2516-6002UG) is required to...

3-8 IQ80960RM/RN Evaluation Board Manual Hardware Reference 3.10 User LEDs The IQ80960RM/RN platform has a bank of eight user-programmable LEDs, located on the upper edge of the adapter board. These LEDs are controlled by a write-only register and used as a debugging aid during development. Software...

4-2 IQ80960RM/RN Evaluation Board Manual i960® RM/RN I/O Processor Overview 4.1 CPU Memory Map The memory map for the IQ80960RM/RN platform is shown in Figure 4-2 . All addresses below 9002 0000H on the IQ80960RM/RN platform are reserved for various functions of the i960 RM/RN I/O processor, as show...

IQ80960RM/RN Evaluation Board Manual 4-3 i960® RM/RN I/O Processor Overview 4.2 Local Interrupts The i960 RM/RN I/O processor is built around an 80960JT core, which has seven external interrupt lines designated XINT0# through XINT5# and NMI#. In the i960 RM/RN I/O processor, these interrupt lines ar...

IQ80960RM/RN Evaluation Board Manual 4-5 i960® RM/RN I/O Processor Overview 4.3 CPU Counter/Timers The i960 RM/RN I/O processor is equipped with two on-chip counter/timers which are clocked with the i960 RM/RN I/O processor clock signal. The i960 RM/RN I/O processor receives its clock from the prima...

4-6 IQ80960RM/RN Evaluation Board Manual i960® RM/RN I/O Processor Overview 4.6 DMA Channels The i960 RM/RN I/O processor features three independent DMA channels, two of which operate on the primary PCI interface, whereas the remaining one operates on the secondary PCI interface. All three of the DM...

IQ80960RM/RN Evaluation Board Manual 4-7 i960® RM/RN I/O Processor Overview Figure 4-5 shows a simplified connection of the Application Accelerator to the i960 RM/RN I/O Processor Internal Bus. 4.8 Performance Monitor Unit The Performance Monitoring features aid in measuring and monitoring various s...

IQ80960RM/RN Evaluation Board Manual 5-1 MON960 Support for IQ80960RM/RN 5 This chapter discusses a number of additions that have been made to MON960 to support the IQ80960RM/RN in an optional non-I 2 O capacity. For complete documentation on the operation of MON960, see the MON960 Debug Monitor Use...

5-2 IQ80960RM/RN Evaluation Board Manual MON960 Support for IQ80960RM/RN is given the ability to initialize the PCI configuration registers to values other than the default power-up values. Configuration Mode gives the user maximum flexibility to customize the way in which the i960 RM/RN I/O process...

IQ80960RM/RN Evaluation Board Manual 5-3 MON960 Support for IQ80960RM/RN 5.2.5 Primary PCI Interface Initialization The IQ80960RM/RN platform is a multi-function PCI device. On the primary PCI bus, two functions (from a PCI Configuration Space standpoint) are supported. • Function 0 is the PCI-to-PC...

5-4 IQ80960RM/RN Evaluation Board Manual MON960 Support for IQ80960RM/RN By default, Primary Outbound Configuration Cycle parameters are not established. The ATU Configuration Register (ATUCR) is initialized to establish the operational parameters for the Doorbell Unit and ATU interrupts (both prima...

IQ80960RM/RN Evaluation Board Manual 5-5 MON960 Support for IQ80960RM/RN 5.3 MON960 Kernel The MON960 Kernel (monitor) provides the IQ80960RM/RN user with a software platform on which application software can be developed and run. The monitor provides several features available to the IQ80960RM/RN u...

5-6 IQ80960RM/RN Evaluation Board Manual MON960 Support for IQ80960RM/RN 5.4.2 PCI BIOS Routines MON960 includes PCI BIOS routines to aid application software initialization of the secondary PCI bus. The supported BIOS functions are described in the subsections that follow. sysPCIBIOSPresent sysFind...

IQ80960RM/RN Evaluation Board Manual 5-7 MON960 Support for IQ80960RM/RN 5.4.2.2 sysFindPCIDevice This function returns the location of PCI devices that have a specific Device ID and Vendor ID. Given a Vendor ID, a Device ID, and an Index, the function returns the Bus Number, Device Number, and Func...

5-8 IQ80960RM/RN Evaluation Board Manual MON960 Support for IQ80960RM/RN 5.4.2.4 sysGenerateSpecialCycle This function allows for generation of PCI Special Cycles. The generated special cycle is broadcast on a specific PCI Bus in the system. PCI Special Cycles are not supported on the IQ80960RM/RN p...

IQ80960RM/RN Evaluation Board Manual 5-9 MON960 Support for IQ80960RM/RN 5.4.2.6 sysReadConfigWord This function allows the caller to read individual shorts (16 bits) from the configuration space of a specific device. The Register Number parameter must be a multiple of two (i.e., bit 0 must be set t...

5-10 IQ80960RM/RN Evaluation Board Manual MON960 Support for IQ80960RM/RN 5.4.2.8 sysWriteConfigByte This function allows the caller to write individual bytes to the configuration space of a specific device. Calling convention: int sysWriteConfigByte ( int bus_number, int device_number, int function...

IQ80960RM/RN Evaluation Board Manual 5-11 MON960 Support for IQ80960RM/RN 5.4.2.10 sysWriteConfigDword This function allows the caller to write individual longs (32 bits) to the configuration space of a specific device. The Register Number parameter must be a multiple of four (i.e., bits 0 and 1 mus...

5-12 IQ80960RM/RN Evaluation Board Manual MON960 Support for IQ80960RM/RN 5.4.2.12 sysSetPCIIrq The PCI Interrupt routing fabric on the IQ80960RM/RN platform is not reconfigurable (fixed mapping relationships); therefore, this function is not supported. Calling convention: int sysSetPCIIrq ( int int...

IQ80960RM/RN Evaluation Board Manual A-1 Bill of Materials A This appendix identifies all components on the IQ80960RN Evaluation Platform ( Table A-1 ), and the IQ80960RM Evaluation Platform ( Table A-2 ). 8 Table A-1. IQ80960RN Bill of Materials (Sheet 1 of 4) Item Qty Location Part Description Man...

IQ80960RM/RN Evaluation Board Manual B-1 Schematics B This appendix includes schematics for the IQ80960RN ( Table B-1 ) and IQ80960RM ( Table B-2 ). Table B-1. IQ80960RN Schematics List Page Schematic Title B-2 Decoupling and 3.3V Power B-3 Primary PCI Interface B-4 Memory Controller B-5 Flash ROM, ...

IQ80960RM/RN Evaluation Board Manual C-1 PLD Code C MODULE BATT //TITLE SDRAM Battery Backup Enable //PATTERN 101-1809-01 //REVISION//AUTHOR J. Neumann //COMPANY Cyclone Microsystems Inc. //DATE 10/30/97 //CHIP PALLV16V8Z-20JI // 1/20/98 Modify target device to PALLV16V8Z-20JI //Initial release. PRS...

IQ80960RM/RN Evaluation Board Manual D-1 Recycling the Battery D The IQ80960RM/RN platform contains four AA NiCd batteries. Each battery has the logo of the Rechargeable Battery Recycling Corporation (RBRC) stamped on it. The recycling fees have been prepaid on these batteries. Do not dispose of a r...