Analog Devices AD9843A - Manuals

Page 2 - GENERAL SPECIFICATIONS; DIGITAL SPECIFICATIONS; to T

– 2 – REV. 0 AD9843A–SPECIFICATIONS GENERAL SPECIFICATIONS Parameter Min Typ Max Unit TEMPERATURE RANGE Operating –20 +85 ° C Storage –65 +150 ° C POWER SUPPLY VOLTAGE Analog, Digital, Digital Driver 2.7 3.6 V POWER CONSUMPTION Normal Operation (Specified Under Each Mode of Operation) Power-Down Mod...

Page 3 - CCD-MODE SPECIFICATIONS

– 3 – REV. 0 AD9843A Parameter Min Typ Max Unit Notes P OWER CONSUMPTION 78 mW See TPC 1 for Power Curves MAXIMUM CLOCK RATE 20 MHz CDS Allowable CCD Reset Transient 1 500 mV See Input Waveform in Note 1 Max CCD Black Pixel Amplitude 1 200 mV Max Input Range Before Saturation 1 1.0 V p-p With 4 dB C...

Page 4 - AUX1-MODE SPECIFICATIONS; AUX2-MODE SPECIFICATIONS

– 4 – REV. 0 AD9843A–SPECIFICATIONS AUX1-MODE SPECIFICATIONS Parameter Min Typ Max Unit POWER CONSUMPTION 60 mW MAXIMUM CLOCK RATE 20 MHz INPUT BUFFER Gain 0 dB Max Input Range 1.0 V p-p VGA Max Output Range 2.0 V p-p Gain Control Resolution 1023 Steps Gain (Selected Using VGA Gain Register) Min Gai...

Page 5 - TIMING SPECIFICATIONS

AD9843A – 5 – REV. 0 TIMING SPECIFICATIONS Parameter Symbol Min Typ Max Unit SAMPLE CLOCKS DATACLK, SHP, SHD Clock Period t CONV 48 50 ns DATACLK High/Low Pulsewidth t ADC 20 25 ns SHP Pulsewidth t SHP 7 12.5 ns SHD Pulsewidth t SHD 7 12.5 ns CLPDM Pulsewidth t CDM 4 10 Pixels CLPOB Pulsewidth 1 t C...

Page 6 - Pin Number

AD9843A – 6 – REV. 0 PIN CONFIGURATION 36 35 34 33 32 31 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5 6 7 8 9 10 11 12 48 47 46 45 44 39 38 37 43 42 41 40 PIN 1IDENTIFIER TOP VIEW (Not to Scale) AUX1IN AVSS AUX2IN AVDD2 BYP4 NC CCDIN (LSB) D0 D1 D2 D3 D4 NC = NO CONNECT D5 D6 D7 D...

Page 7 - DEFINITIONS OF SPECIFICATIONS; PEAK NONLINEARITY; Figure 2. Data Outputs

AD9843A – 7 – REV. 0 DEFINITIONS OF SPECIFICATIONS DIFFERENTIAL NONLINEARITY (DNL) An ideal ADC exhibits code transitions that are exactly 1 LSBapart. DNL is the deviation from this ideal value. Thus every codemust have a finite width. No missing codes guaranteed to 10-bitresolution indicates that a...

Page 8 - TPC 2. Typical DNL Performance; –Typical Performance Characteristics

AD9843A – 8 – REV. 0 SAMPLE RATE – MHz 100 70 40 5 20 10 POWER DISSIPATION – mW 50 60 80 90 15 V DD = 3.3V V DD = 3.0V V DD = 2.7V TPC 1. Power vs. Sample Rate 0 1000 400 200 600 800 0 –0.5 0.5 0.25 –0.25 TPC 2. Typical DNL Performance –Typical Performance Characteristics VGA GAIN CODE – LSB 4 2 0 0...

Page 9 - Figure 6. Typical CCD-Mode Line Clamp Timing

AD9843A – 9 – REV. 0 CCD-MODE AND AUX-MODE TIMING N–10 N–9 N–8 N–1 N N N+1 N+2 N+9 N+10 t ID t ID t S1 t S2 t CP t INH t OD t H NOTES:1. RECOMMENDED PLACEMENT FOR DATACLK RISING EDGE IS BETWEEN THE SHD RISING EDGE AND NEXT SHP FALLING EDGE.2. CCD SIGNAL IS SAMPLED AT SHP AND SHD RISING EDGES. SHP SH...

Page 10 - Register; Figure 8. Serial Write Operation

AD9843A – 1 0 – REV. 0 SERIAL INTERFACE TIMING AND INTERNAL REGISTER DESCRIPTION Table I. Internal Register Map Register Address Data Bits Name A0 A1 A2 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 Operation 0 0 0 Channel Select Power-Down Software OB Clamp 0 * 1 ** 0 * 0 * 0 * CCD/AUX Modes Reset On/Off VGA G...

Page 12 - ) of 3 ns is caused by internal; Figure 12. CDS Gain Curve

AD9843A – 1 2 – REV. 0 2dB TO 36dB CLPDM CCDIN 10 DIGITAL FILTERING CLPOB DC RESTORE INPUT OFFSET CLAMP OPTICAL BLACK CLAMP 0 TO 64 LSB 0.1 F DOUT 10-BIT ADC VGA 8-BIT DAC 8 VGA GAIN REGISTER 10 CDS –2dB TO +10dB INTERNAL V REF 2V FULL SCALE CDS GAIN REGISTER 6 CLAMP LEVEL REGISTER Figure 11. CCD-Mo...

Page 13 - Variable Gain Amplifier; Code Range; Gain; Optical Black Clamp

AD9843A – 1 3 – REV. 0 together with CLPOB or separately. The CLPDM pulse shouldbe a minimum of four pixels wide. Variable Gain Amplifier The VGA stage provides a gain range of 2 dB to 36 dB, program-mable with 10-bit resolution through the serial digital interface.Combined with the typical 4 dB gai...

Page 14 - Table VIII. VGA Gain Register Used for AUX2-Mode; MSB; Figure 14. AUX1 Circuit Configuration; Figure 16. System Applications Diagram

AD9843A – 1 4 – REV. 0 Table VIII. VGA Gain Register Used for AUX2-Mode MSB LSB D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Gain (dB) X 0 X X X X X X X X X 0.0 1 0 0 0 0 0 0 0 0 0 0.0 • • • • • • 1 1 1 1 1 1 1 1 1 1 18.0 AUX1IN 0.1 F VGA GAIN REGISTER ADC VGA 10 5k 0.4V 0.4V INPUT SIGNAL ??V 0.8V 0.4V MIDSCAL...

Page 15 - Figure 17. Recommended Circuit Configuration for CCD-Mode

AD9843A – 1 5 – REV. 0 APPLICATIONS INFORMATION The AD9843A is a complete Analog Front End (AFE) productfor digital still camera and camcorder applications. As shown inFigure 16, the CCD image (pixel) data is buffered and sent tothe AD9843A analog input through a series input capacitor.The AD9843A p...

Page 16 - OUTLINE DIMENSIONS

– 1 6 – C02194–0–10/00 (rev. 0) PRINTED IN U.S.A. AD9843A REV. 0 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 48-Lead LQFP (ST-48) TOP VIEW (PINS DOWN) 1 12 13 25 24 36 37 48 0.019 (0.5) BSC 0.276 (7.00) BSC SQ 0.011 (0.27)0.006 (0.17) 0.354 (9.00) BSC SQ 0.063 (1.60) MAX 0.030 (0.75)0.01...