Analog Devices AD9883A - Manual
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Table of Contents:
- Page 2 – Analog Interface
- Page 4 – CAUTION; ABSOLUTE MAXIMUM RATINGS
- Page 5 – PIN CONFIGURATION; Table I. Complete Pinout List
- Page 7 – not; POWER SUPPLY; Digital Inputs
- Page 8 – At that point the signal should be resistively terminated (75; Figure 1. Analog Input Interface Circuit; Serial Control Port; as; RGB Clamping; F capacitor, (even if midscale clamping is
- Page 9 – Figure 2. Gain and Offset Control; Gain and Offset Control; Figure 3. Typical Clamp Configuration; Clock Generation; Figure 4. Pixel Sampling Times; Figure 5. Pixel Clock Jitter vs. Frequency
- Page 10 – Figure 6. PLL Loop Filter Detail; Table II. VCO Frequency Ranges; Table III. Charge Pump Current/Control Bits; NOTES
- Page 11 – Figure 7. Output Timing; Hsync Timing
- Page 13 – Vsync will be used only if Bit 1 is set to Logic 1.
- Page 14 – PWRDN
- Page 15 – NOTE; TWO-WIRE SERIAL CONTROL REGISTER DETAIL; VCORNGE
- Page 16 – decreases; Override Bit; falling
- Page 21 – Serial Interface Read/Write Examples; Figure 11. Serial Interface—Typical Byte Transfer
- Page 23 – Figure 13. Current Loop; PLL
- Page 24 – OUTLINE DIMENSIONS
REV. 0
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
AD9883A
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001
110 MSPS/140 MSPS Analog Interface for
Flat Panel Displays
FUNCTIONAL BLOCK DIAGRAM
R
AIN
R
OUTA
G
AIN
G
OUTA
B
AIN
B
OUTA
MIDSCV
SYNC
PROCESSING
AND CLOCK
GENERATION
HSYNC
COAST
CLAMP
FILT
DTACK
HSOUT
VSOUT
SOGOUT
REF
REF
BYPASS
SERIAL REGISTER
AND
POWER MANAGEMENT
SCL
SDA
A
0
AD9883A
CLAMP
8
A/D
CLAMP
8
A/D
CLAMP
8
A/D
FEATURES
140 MSPS Maximum Conversion Rate
300 MHz Analog Bandwidth
0.5 V to 1.0 V Analog Input Range
500 ps p-p PLL Clock Jitter at 110 MSPS
3.3 V Power Supply
Full Sync Processing
Sync Detect for ”Hot Plugging”
Midscale Clamping
Power-Down Mode
Low Power: 500 mW Typical
4:2:2 Output Format Mode
APPLICATIONS
RGB Graphics Processing
LCD Monitors and Projectors
Plasma Display Panels
Scan Converters
Microdisplays
Digital TV
GENERAL DESCRIPTION
The AD9883A is a complete 8-bit, 140 MSPS monolithic analog
interface optimized for capturing RGB graphics signals from
personal computers and workstations. Its 140 MSPS encode
rate capability and full power analog bandwidth of 300 MHz
supports resolutions up to SXGA (1280
×
1024 at 75 Hz).
The AD9883A includes a 140 MHz triple ADC with internal
1.25 V reference, a PLL, and programmable gain, offset, and
clamp control. The user provides only a 3.3 V power supply,
analog input, and HSYNC and COAST signals. Three-state
CMOS outputs may be powered from 2.5 V to 3.3 V.
The AD9883A’s on-chip PLL generates a pixel clock from
HSYNC and COAST inputs. Pixel clock output frequencies
range from 12 MHz to 140 MHz. PLL clock jitter is 500 ps p-p
typical at 140 MSPS. When the COAST signal is presented,
the PLL maintains its output frequency in the absence of
HSYNC. A sampling phase adjustment is provided. Data,
HSYNC and Clock output phase relationships are maintained.
The AD9883A also offers full sync processing for composite
sync and sync-on-green applications.
A clamp signal is generated internally or may be provided by the
user through the CLAMP input pin. This interface is fully pro-
grammable via a 2-wire serial interface.
Fabricated in an advanced CMOS process, the AD9883A is
provided in a space-saving 80-lead LQFP surface mount plastic
package and is specified over the 0
°
C to 70
°
C temperature range.
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Summary
REV. 0 – 2 – AD9883A–SPECIFICATIONS Test AD9883AKST-110 AD9883AKST-140 Parameter Temp Level Min Typ Max Min Typ Max Unit RESOLUTION 8 8 Bits DC ACCURACY Differential Nonlinearity 25 ° C I ± 0.5 +1.25/–1.0 ± 0.5 +1.35/–1.0 LSB Full VI +1.35/–1.0 +1.45/–1.0 LSB Integral Nonlinearity 25 ° C I ± 0.5 ± 1...
REV. 0 AD9883A – 4 – CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readilyaccumulate on the human body and test equipment and can discharge without detection. Althoughthe AD9883A features proprietary ESD protection circuitry, permanent damage may occ...
REV. 0 – 5 – AD9883A PIN CONFIGURATION GND GREEN <7> GREEN <6> GREEN <5> GREEN <4> GREEN <3> GREEN <2> GREEN <1> GREEN <0> GND V DD BLUE <7> BLUE <6> BLUE <5> BLUE <4> BLUE <3> BLUE <2> BLUE <1> BLUE <0> ...
