Texas Instruments VLYNQ Port - Manual

Texas Instruments VLYNQ Port

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Table of Contents:

  • Page 3 – Contents
  • Page 4 – Appendix B Write/Read Performance; Write Performance; Appendix C Revision History
  • Page 7 – Read This First; About This Document; This document uses the following conventions.; Related Documentation From Texas Instruments; . Tip: Enter the literature number in the
  • Page 8 – SPRAAA6; Trademarks; VLYNQ is a trademark of Texas Instruments.
  • Page 9 – Introduction; Purpose of the Peripheral
  • Page 10 – Figure 1; Figure 1. VLYNQ Port Functional Block Diagram
  • Page 11 – Clock Control; VLYNQ; Peripheral Architecture; The reset value of the CLKDIR bit is 0 (external clock source).; Figure 2. External Clock Block Diagram
  • Page 12 – The VLYNQ interface signals are shown in; Table 1. VLYNQ Port Pins; Pin Name; Appendix A
  • Page 13 – VLYNQ Functional Description; Figure 4; Figure 4. VLYNQ Module Structure
  • Page 14 – Write Operations; The data flow between two VLYNQs that are connected is shown in; Figure 5. Write Operations
  • Page 15 – Read Operations; Figure 6; Figure 6. Read Operations
  • Page 16 – Appendix B; Table 2. Serial Interface Width; VLYNQWD
  • Page 17 – Address Translation; Figure 7
  • Page 18 – Figure 7. Example Address Memory Map; Table 3; Register
  • Page 19 – Table 4
  • Page 20 – Example 1. Address Translation Example
  • Page 21 – Reset Considerations; Software Reset Considerations; Interrupt Support; Interrupt Events and Requests; CAUTION; Writing directly to the INTPENDSET
  • Page 22 – Writes to Interrupt Pending/Set Register; Figure 8. Interrupt Generation Mechanism Block Diagram
  • Page 23 – DMA Event Support; Set the INT2CFG bit to 1 in the VLYNQ control register (CTRL).
  • Page 24 – The power conservation modes that are available via the PSC are:
  • Page 25 – VLYNQ Port Registers; Table 5; Table 5. VLYNQ Register Address Space; Table 6; Table 6. VLYNQ Port Controller Registers
  • Page 26 – Figure 9; Bit
  • Page 27 – and described in
  • Page 32 – Table 13. Interrupt Pointer Register (INTPTR) Field Descriptions
  • Page 34 – Receive Address Map Size 1 Register (RAMS1)
  • Page 38 – Table 24. Auto Negotiation Register (AUTNGO) Field Descriptions
  • Page 39 – Remote Configuration Registers; The remote configuration registers listed in; Table 25. VLYNQ Port Remote Controller Registers; Offset
  • Page 40 – Appendix A VLYNQ Protocol Specifications; Special 8b/10b Code Groups
  • Page 41 – VLYNQ 2.0 Packet Format; The byte disable symbol masks bytes for write operations.
  • Page 42 – Field
  • Page 43 – . This protocol can be extended to apply to multiple channels
  • Page 45 – encoding is removed, the maximum write rate is 396
  • Page 47 – Read Performance; Table B-3. Relative Performance with Various Latencies; Number of VLYNQ Pins
  • Page 48 – Appendix C; Reference
  • Page 49 – IMPORTANT NOTICE; Products
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TMS320DM644x DMSoC

VLYNQ Port

User's Guide

Literature Number: SPRUE36A

September 2007

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Summary

Page 3 - Contents

Contents Preface ............................................................................................................................... 7 1 Introduction ................................................................................................................ 9 1.1 Purpose of the Peri...

Page 4 - Appendix B Write/Read Performance; Write Performance; Appendix C Revision History

A.2 Supported Ordered Sets ....................................................................................... 40 A.3 VLYNQ 2.0 Packet Format .................................................................................... 41 A.4 VLYNQ 2.X Packets ...............................................

Page 7 - Read This First; About This Document; This document uses the following conventions.; Related Documentation From Texas Instruments; . Tip: Enter the literature number in the

Preface SPRUE36A – September 2007 Read This First About This Document This document describes the VLYNQ™ communications interface port in the TMS320DM644x DigitalMedia System-on-Chip (DMSoC). Notational Conventions This document uses the following conventions. • Hexadecimal numbers are shown with th...

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