Page 3 - iii; Preface; Purpose of the Manual; at
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 iii Preface Purpose of the Manual This manual contains all the information you will need concerning the configuration, communication, memory concept, cycle, response times and technical data for the CPUs. You will then lear...
Page 4 - iv; Approvals; The SIMATIC S7-300 product series has the following approvals:; CE label; the following; C tick mark
Preface CPU 31xC and CPU 31x, Technical data iv Manual, Edition 08/2004, A5E00105475-05 Note There you can obtain the descriptions of all current modules. For new modules, or modules of a more recent version, we reserve the right to include a Product Information containing latest information. Approv...
Page 5 - This manual is part of the S7-300 documentation package.
Preface CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 v Documentation classification This manual is part of the S7-300 documentation package. Name of the manual Description YOU ARE READING the Manual • CPU 31xC and CPU 31x, Technical data Control and display elements, ...
Page 6 - Additional information required:; Recycling and Disposal; a certified disposal facility for electronic scrap.
Preface CPU 31xC and CPU 31x, Technical data vi Manual, Edition 08/2004, A5E00105475-05 Additional information required: Name of the manual Description Reference Manual System software for S7-300/400 system and standard functions Description of the SFCs, SFBs and OBs. This manual is part of the STEP...
Page 7 - vii; Table of contents; to
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 vii Table of contents Preface ...................................................................................................................................................... iii 1 Guide to the S7-300 documentation .....
Page 9 - ix
Table of contents CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 ix 6.5 CPU 314C-2 PtP and CPU 314C-2 DP ................................................................................... 6-21 6.6 Technical data of the integrated I/O.......................................
Page 10 - New System Standard Functions of PROFINET IO and PROFIBUS DP and
Table of contents CPU 31xC and CPU 31x, Technical data x Manual, Edition 08/2004, A5E00105475-05 Tables Table 1-1 Application area covered by this manual ...................................................................................... iii Table 1-1 Ambient influence on the automation system (A...
Page 11 - xi
Table of contents CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 xi Table 4-1 Retentivity of the RAM ............................................................................................................... 4-2 Table 4-2 Retentive behavior of memory objects (appli...
Page 12 - xii
Table of contents CPU 31xC and CPU 31x, Technical data xii Manual, Edition 08/2004, A5E00105475-05 Table 7-1 Available MMCs ......................................................................................................................... 7-2 Table 7-2 Maximum number of loadable blocks on the...
Page 13 - Guide to the S7-300 documentation; Overview
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 1-1 Guide to the S7-300 documentation 1 Overview There you find a guide leading you through the S7-300 documentation. Selecting and configuring Table 1-1 Ambient influence on the automation system (AS) Information on.. is a...
Page 17 - Operating and display elements; Operating and display elements: CPU 31xC; Operating and display elements of CPU 31xC; The figures show
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 2-1 Operating and display elements 2 2.1 Operating and display elements: CPU 31xC Operating and display elements of CPU 31xC SF BF DC5V RUN STOP RUNSTOPMRES FRCE X1 X2 X11 X12 MMC 1 2 3 4 5 6 7 The figures show the followin...
Page 18 - The figure shows; Slot for the SIMATIC Micro Memory Card (MMC)
Operating and display elements 2.1 Operating and display elements: CPU 31xC CPU 31xC and CPU 31x, Technical data 2-2 Manual, Edition 08/2004, A5E00105475-05 The figure below illustrates the integrated digital and analog I/Os of the CPU with open front covers. SF BF DC5V FRCE RUN STOP RUN STOPMRES X1...
Page 20 - Status and Error Indicators: CPU 31xC; CPU operating modes:
Operating and display elements 2.1 Operating and display elements: CPU 31xC CPU 31xC and CPU 31x, Technical data 2-4 Manual, Edition 08/2004, A5E00105475-05 2.1.1 Status and Error Indicators: CPU 31xC LED designation Color Meaning SF red Hardware or software error BF (for CPUs with DP interface only...
Page 21 - Operating and display elements: CPU 31x
Operating and display elements 2.2 Operating and display elements: CPU 31x CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 2-5 2.2 Operating and display elements: CPU 31x 2.2.1 Operating and display elements: CPU 312, 314, 315-2 DP: Operating and display elements SF BF D...
Page 22 - The mode selector switch is used to set the CPU operating mode.
Operating and display elements 2.2 Operating and display elements: CPU 31x CPU 31xC and CPU 31x, Technical data 2-6 Manual, Edition 08/2004, A5E00105475-05 Slot for the SIMATIC Micro Memory Card (MMC) A SIMATIC Micro Memory Card (MMC) is used as memory module. You can use MMCs as load memory and as ...
Page 23 - Operating and display elements: CPU 317-2 DP
Operating and display elements 2.2 Operating and display elements: CPU 31x CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 2-7 2.2.2 Operating and display elements: CPU 317-2 DP Operating and display elements RUN STOP MRES BF1 BF2 SF DC5V FRCE RUN STOP X2 X1 MMC 1 2 3 4 ...
Page 24 - Use the mode selector switch to set the CPU operating mode.
Operating and display elements 2.2 Operating and display elements: CPU 31x CPU 31xC and CPU 31x, Technical data 2-8 Manual, Edition 08/2004, A5E00105475-05 Slot for the SIMATIC Micro Memory Card (MMC) A SIMATIC Micro Memory Card (MMC) is used as memory module. You can use MMCs as load memory and as ...
Page 27 - Status and error displays of the CPU 31x
Operating and display elements 2.2 Operating and display elements: CPU 31x CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 2-11 2.2.4 Status and error displays of the CPU 31x General status and error displays Table 2-6 General status and error displays of the CPU 31x LED...
Page 29 - Communication; Interfaces; Availability; DP interface, set DP interface mode in STEP 7.; Properties; and automatically connect to a MPI subnet.
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-1 Communication 3 3.1 Interfaces 3.1.1 Multi-Point Interface (MPI) Availability All CPUs described in this manual are equipped with an MPI interface X1. A CPU equipped with an MPI/DP interface is configured and supplied a...
Page 30 - Devices capable of MPI communication; PROFIBUS DP; STEP 7 if you want to use the DP interface.; Operating modes for CPUs with two DP interfaces; you can specify to disable bus parameter broadcasting.
Communication 3.1 Interfaces CPU 31xC and CPU 31x, Technical data 3-2 Manual, Edition 08/2004, A5E00105475-05 Devices capable of MPI communication • PG/PC • OP/TP • S7-300 / S7-400 with MPI interface • S7-200 (19.2 kbps only) 3.1.2 PROFIBUS DP Availability CPUs with “DP“ name suffix are equipped at ...
Page 32 - PG/PC with network card; Connector design; to the
Communication 3.1 Interfaces CPU 31xC and CPU 31x, Technical data 3-4 Manual, Edition 08/2004, A5E00105475-05 Devices capable of PROFINET (PN) communication • PROFINET IO components (for example, interface module IM 151-3 PN in an ET 200S) • S7-300 / S7-400 with PROFINET interface (for example, CPU ...
Page 34 - Communication services; Selecting the communication service; choice of communication service will have no effect on:; Overview of communication services
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data 3-6 Manual, Edition 08/2004, A5E00105475-05 3.2 Communication services 3.2.1 Overview of communication services Selecting the communication service You need to decide on a communication service, based on functionality requ...
Page 35 - PG communication; integrated in the operating system of; OP communication; maintain several simultaneous connections to one or several OPs.; Data exchanged by means of S7 basic communication
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-7 See also Distribution and availability of S7 connection resources (Page 3-29) Connection resources for routing (Page 3-31) 3.2.2 PG communication Properties PG communication is u...
Page 36 - S7 communication
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data 3-8 Manual, Edition 08/2004, A5E00105475-05 Reference • Details on SFCs are found in the Instruction list , for more details refer to the STEP 7 Online Help or to the System and Standard Functions Reference Manual. • For f...
Page 38 - Routing; download user programs
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data 3-10 Manual, Edition 08/2004, A5E00105475-05 GD resources of the CPUs Table 3-4 GD resources of the CPUs Parameters CPU 31xC, 312, 314 CPU 315-2 DP, 315-2 PN/DP, 317 Number of GD circuits per CPU Max. 4 Max. 8 GD packets t...
Page 39 - the router for subnet 1 and 2 CPU 2 is the router for subnet 2 and 3.
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-11 Routing network nodes: MPI - DP Gateways between subnets are routed in a SIMATIC station that is equipped with interfaces to the respective subnets. The figure below shows CPU 1...
Page 40 - Routing network nodes: MPI – DP - Ethernet; Number of routed connections; Number of routing connections for DP CPUs
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data 3-12 Manual, Edition 08/2004, A5E00105475-05 Routing network nodes: MPI – DP - Ethernet CPU 1 (e.g. 315-2 DP) PN Subnet 3 (PROFInet) PN PG Subnet 2 (PROFIBUS) DP (master) MPI Subnet 1 (MPI) MPI/DP (active slave) CPU 2 (317...
Page 41 - The network configuration does not exceed project limits.
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-13 Requirements • The station modules are "capable of routing" (CPUs or CPs). • The network configuration does not exceed project limits. • The modules have loaded the conf...
Page 42 - Routing: Example of a TeleService application; Real installation
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data 3-14 Manual, Edition 08/2004, A5E00105475-05 Routing: Example of a TeleService application The figure below shows the example of an application for remote maintenance of an S7 station using a PG. The connection to other su...
Page 43 - PtP communication
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-15 Reference • on configuring in STEP 7 is found in the Configuring Hardware and Connections in STEP 7 manual • of a basic nature is contained in the Communication with SIMATIC Man...
Page 44 - Data consistency; consequent enhancement of:
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data 3-16 Manual, Edition 08/2004, A5E00105475-05 3.2.9 Data consistency Properties A data area is considered consistent, if the operating system can read/write access the data area in a continuous block. Data exchanged collect...
Page 46 - Extent of PROFINET IO and Component-Based Automation; . Differences between PROFIBUS DP and PROFINET IO and their
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data 3-18 Manual, Edition 08/2004, A5E00105475-05 Extent of PROFINET CBA and PROFINET IO PROFINET IO and CBA represent two different views of automation devices on Industrial Ethernet. 352),1(7 &RPSRQHQW9LHZ 352),1(7&%$...
Page 47 - The following graphic shows the new functions of PROFINET IO
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-19 3.2.10.1 PROFINET IO System Extended Functions of PROFINET IO The following graphic shows the new functions of PROFINET IO &38[31'3 (7 '36/$9( 5RXWHU 6ZLWFK ,2 &RQWUROOH...
Page 49 - converting from PROFIBUS DP to PROFINET IO.
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-21 Comparison of the System and Standard Functions of PROFINET IO and PROFIBUS DP For CPUs with an integrated PROFINET interface, the table below provides you with an overview of: ...
Page 50 - PROFIBUS DP to PROFINET IO.; Detailed Information
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data 3-22 Manual, Edition 08/2004, A5E00105475-05 The following table provides you with an overview of the system and standard functions for SIMATIC, whose functionality must be implemented by other functions when converting fr...
Page 51 - This chapter explains the following:; Compatibility of the new SSLs
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-23 3.2.10.3 System status lists (SSLs) in PROFINET IO Chapter Content This chapter explains the following: • Which SSLs are intended for PROFINET • Which SSLs are intended for PROF...
Page 52 - communication functionality via Industrial Ethernet (in short:
Communication 3.2 Communication services CPU 31xC and CPU 31x, Technical data 3-24 Manual, Edition 08/2004, A5E00105475-05 Detailed Information For detailed descriptions of the individual system status lists, refer to the manual System Software for S7-300/400 System and Standard Functions . 3.2.10.4...
Page 54 - refer to the; PROFINET System Description.; S7 connections; S7 connection as communication path; S7 connection is the communication path.
Communication 3.3 S7 connections CPU 31xC and CPU 31x, Technical data 3-26 Manual, Edition 08/2004, A5E00105475-05 3.2.10.5 SNMP communication service Availability The SNMP communication service is available for CPUs with integrated PROFINET interface and Firmware 2.3.0 or higher. Properties SNMP (S...
Page 55 - Assignment of S7 connections; Reservation during configuration
Communication 3.3 S7 connections CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-27 Connection points An S7 connection between modules with communication capability is established between connection points. The S7 connection always has two connection points: The active...
Page 57 - Distribution and availability of S7 connection resources; Distribution of connection resources
Communication 3.3 S7 connections CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-29 3.3.3 Distribution and availability of S7 connection resources Distribution of connection resources Table 3-10 Distribution of connections Communication service Distribution PG communic...
Page 58 - Availability of connection resources
Communication 3.3 S7 connections CPU 31xC and CPU 31x, Technical data 3-30 Manual, Edition 08/2004, A5E00105475-05 Availability of connection resources Table 3-11 Availability of connection resources Reserved for CPU Total number connection resources PG communication OP communication S7 basic commun...
Page 59 - Connection resources for routing; Number of connection resources for routing; CPU; Example of a CPU 314C-2 DP
Communication 3.3 S7 connections CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-31 3.3.4 Connection resources for routing Number of connection resources for routing The CPUs with DP interface provide a different number of connection resources for the routing function:...
Page 60 - Definition DPV1; revision 3 or later.; Extended functions of DPV1; User-friendly SFB for reading diagnostics.
Communication 3.4 DPV1 CPU 31xC and CPU 31x, Technical data 3-32 Manual, Edition 08/2004, A5E00105475-05 3.4 DPV1 New automation and process engineering tasks require the range of functions performed by the existing DP protocol to be extended. In addition to cyclical communication functions, acyclic...
Page 61 - , or directly to the
Communication 3.4 DPV1 CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 3-33 Interrupt blocks with DPV1 functionality Table 3-13 Interrupt blocks with DPV1 functionality OB Functionality OB 40 Process interrupt OB 55 Status interrupt OB 56 Update interrupt OB 57 Vendor-sp...
Page 63 - Memory concept; Memory areas and retentivity; CPU memory areas; The three memory areas of your CPU:; Memory of the CPU; Load memory; configuration data for your project on the MMC.
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 4-1 Memory concept 4 4.1 Memory areas and retentivity 4.1.1 CPU memory areas The three memory areas of your CPU: CPU Loading memory (located on the MMC) Memory of the CPU System memory Working memory MMC Load memory The loa...
Page 64 - the process image of the I/Os; Retentivity of the load memory, system memory and RAM; protected against power failure or CPU memory reset.
Memory concept 4.1 Memory areas and retentivity CPU 31xC and CPU 31x, Technical data 4-2 Manual, Edition 08/2004, A5E00105475-05 System memory The RAM system memory is integrated in the CPU and cannot be expanded. It contains • the address areas for address area memory bits, timers and counters • th...
Page 65 - Retentivity of memory objects; Retentive behavior of memory objects
Memory concept 4.1 Memory areas and retentivity CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 4-3 Retentive data in RAM Therefore, the contents of retentive DBs are always retentive at restart and POWER ON/OFF. CPUs V2.1.0 or higher also support volatile DBs (the volat...
Page 66 - accepts the initial values from load memory (non-retentive DB)
Memory concept 4.1 Memory areas and retentivity CPU 31xC and CPU 31x, Technical data 4-4 Manual, Edition 08/2004, A5E00105475-05 Retentive behavior of a DB for CPUs with firmware >= V2.1.0 For these CPUs you can specify in STEP 7 (beginning with version 5.2 + SP 1), or at SFC 82 CREA_DBL (paramet...
Page 67 - Address areas of system memory; Recipes and measurement value logs; Reference; The address areas of your CPU are listed in the; Instruction list for CPUs 31xC and 31x; faster than direct access to the signal modules.
Memory concept 4.1 Memory areas and retentivity CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 4-5 4.1.4 Address areas of system memory System memory of the S7 CPUS is organized in address areas (refer to the table below). In a corresponding operation of your user progr...
Page 68 - sequence of this operation within a cycle.; Cycle time
Memory concept 4.1 Memory areas and retentivity CPU 31xC and CPU 31x, Technical data 4-6 Manual, Edition 08/2004, A5E00105475-05 Process image update The operating system updates the process image periodically. The figure below shows the sequence of this operation within a cycle. Cycle time Startup ...
Page 69 - Note the information below:
Memory concept 4.1 Memory areas and retentivity CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 4-7 Configurable process image with CPU317 (FW V2.3.0 or higher) IN STEP 7, you can define a user-specific size of the I/O process images between 0 to 2048 for a CPU317, FW V2...
Page 70 - Local data; the temporary variables of code blocks; See also
Memory concept 4.1 Memory areas and retentivity CPU 31xC and CPU 31x, Technical data 4-8 Manual, Edition 08/2004, A5E00105475-05 Local data Local data store: • the temporary variables of code blocks • the start information of the OBs • transfer parameters • intermediate results Temporary Variables W...
Page 71 - Properties of the Micro Memory Card (MMC); The MMC as memory module for the CPU; use MMCs as load memory or as a portable storage medium.; Properties of an MMC
Memory concept 4.1 Memory areas and retentivity CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 4-9 4.1.5 Properties of the Micro Memory Card (MMC) The MMC as memory module for the CPU The memory module used on your CPU is a SIMATIC Micro Memory Card (MMC.) You can use M...
Page 73 - General: Memory functions; Memory functions; Loading user program from Micro Memory Card (MMC) to the CPU; User program download; until all the blocks are downloaded.
Memory concept 4.2 Memory functions CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 4-11 4.2 Memory functions 4.2.1 General: Memory functions Memory functions Memory functions are used to generate, modify or delete entire user programs or specific blocks. You can also en...
Page 74 - Handling with modules; Download of new blocks or delta downloads; influence CPU memory.
Memory concept 4.2 Memory functions CPU 31xC and CPU 31x, Technical data 4-12 Manual, Edition 08/2004, A5E00105475-05 Note This function is only permitted when the CPU is in STOP mode. Load memory is cleared if the load operation could not be completed due to power loss or illegal block data. 4.2.3 ...
Page 75 - CPU memory reset and restart
Memory concept 4.2 Memory functions CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 4-13 4.2.3.3 Deleting blocks Deleting blocks When you delete a block, it is deleted from load memory. In STEP 7, you can also delete blocks with the user program (DBs also with SFC 23 ...
Page 77 - Recipes; Introduction; should exist per recipe.; Processing sequence; Recipe is written to load memory:; Recipe 1; Saving a modified recipe:
Memory concept 4.2 Memory functions CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 4-15 4.2.5 Recipes Introduction A recipe represents a collection of user data. You can implement a simple recipe concept using static DBs. In this case, the recipes should have the same s...
Page 78 - communication lines.
Memory concept 4.2 Memory functions CPU 31xC and CPU 31x, Technical data 4-16 Manual, Edition 08/2004, A5E00105475-05 Note As a precaution against loss of data, always make sure that you do not exceed the maximum number of delete/write operations. Also refer to the SIMATIC Micro Memory Card (MMC) se...
Page 79 - Measured value log files
Memory concept 4.2 Memory functions CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 4-17 4.2.6 Measured value log files Introduction Measured values are generated when the CPU executes the user program. These values are to be logged and analyzed. Processing sequence Acqu...
Page 81 - Backup of project data to a Micro Memory Card (MMC); Function principle; uncompressed when fetched.
Memory concept 4.2 Memory functions CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 4-19 4.2.7 Backup of project data to a Micro Memory Card (MMC) Function principle Using the Save project to Memory Card and Fetch project from Memory Card functions, you can save all proj...
Page 83 - Cycle and reaction times
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-1 Cycle and reaction times 5 5.1 Overview Overview This section contains detailed information about the following topics: • Cycle time • Reaction time • Interrupt response time • Sample calculations Reference: Cycle time ...
Page 84 - you can calculate it.; Meaning of the term cycle time
Cycle and reaction times 5.2 Cycle time CPU 31xC and CPU 31x, Technical data 5-2 Manual, Edition 08/2004, A5E00105475-05 5.2 Cycle time 5.2.1 Overview Introduction This section explains what we mean by the term "cycle time", what it consists of, and how you can calculate it. Meaning of the t...
Page 86 - Extending the cycle time
Cycle and reaction times 5.2 Cycle time CPU 31xC and CPU 31x, Technical data 5-4 Manual, Edition 08/2004, A5E00105475-05 Extending the cycle time Always make allowances for the extension of the cycle time of a user program due to: • Time-based interrupt processing • Process interrupt processing • Di...
Page 87 - Calculating the cycle time
Cycle and reaction times 5.2 Cycle time CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-5 5.2.2 Calculating the cycle time Introduction The cycle time is derived from the sum of the following influencing factors. Process image update The table below shows the time a CP...
Page 88 - Extending the user program processing time; runs a number of processes in parallel
Cycle and reaction times 5.2 Cycle time CPU 31xC and CPU 31x, Technical data 5-6 Manual, Edition 08/2004, A5E00105475-05 Table 5-4 CPU 31x: Data for calculating the process image (PI) transfer time Const. Portions CPU 312 CPU 314 CPU 315 CPU 317 K Base load 150 μs 100 μs 100 μs 50 μs A per byte in m...
Page 89 - functions; Extension of the cycle time as a result of nested interrupts
Cycle and reaction times 5.2 Cycle time CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-7 Operating system processing time at the scan cycle checkpoint The table below shows the operating system processing time at the scan cycle checkpoint of the CPUs. These times are ...
Page 90 - Extension of the cycle time due to error; Cycle time extension as a result of errors; Different cycle times; Block processing times may fluctuate
Cycle and reaction times 5.2 Cycle time CPU 31xC and CPU 31x, Technical data 5-8 Manual, Edition 08/2004, A5E00105475-05 Extension of the cycle time due to error Table 5-8 Cycle time extension as a result of errors Type of error Programming errors I/O access errors 312C 600 μs 600 μs 313C 400 μs 400...
Page 91 - In; STEP 7; switches to STOP mode if OB80 does not exist in its memory.; Communication load
Cycle and reaction times 5.2 Cycle time CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-9 Maximum cycle time In STEP 7 you can modify the default maximum cycle time. OB80 is called on when this time expires. In this block you can specify the CPUs response to this timeo...
Page 92 - Physical cycle time depending on communication load; Influence on the physical cycle time; maximum cycle time, otherwise timing errors may occur.; Tips; Use the default setting wherever possible.
Cycle and reaction times 5.2 Cycle time CPU 31xC and CPU 31x, Technical data 5-10 Manual, Edition 08/2004, A5E00105475-05 Physical cycle time depending on communication load The figure below describes the non-linear dependency of the physical cycle time on communication load. In our sample we have c...
Page 94 - PROFINET interconnections.; Number
Cycle and reaction times 5.2 Cycle time CPU 31xC and CPU 31x, Technical data 5-12 Manual, Edition 08/2004, A5E00105475-05 Note The use of CBA with cyclical PROFINET interconnections requires the use of switches to maintain the performance data. 100-Mbit full-duplex operation is mandatory with cyclic...
Page 95 - PROFINET interconnections to remote partners at PROFINET:; Base load through PROFIBUS devices; interconnections to a partner.
Cycle and reaction times 5.2 Cycle time CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-13 Additional marginal conditions The maximum cycle load through communication in the measurement is 20 %. The lower graphic shows that the OB1 cycle is influenced by increasing the...
Page 96 - Response time
Cycle and reaction times 5.3 Response time CPU 31xC and CPU 31x, Technical data 5-14 Manual, Edition 08/2004, A5E00105475-05 5.3 Response time 5.3.1 Overview Definition of response time The response time is the time between the detection of an input signal and the change of a linked output signal. F...
Page 97 - that the data of each DP slave has an average length of 4 bytes.; separately and then add up the results.
Cycle and reaction times 5.3 Response time CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-15 DP cycle times in the PROFIBUS DP network If you have configured your PROFIBUS DP master system in STEP 7, STEP 7 calculates the typical DP cycle time to be expected. You can ...
Page 98 - Shortest response time; Conditions for the shortest response time; Calculation
Cycle and reaction times 5.3 Response time CPU 31xC and CPU 31x, Technical data 5-16 Manual, Edition 08/2004, A5E00105475-05 5.3.2 Shortest response time Conditions for the shortest response time The figure below shows the conditions under which the shortest response time is reached. Delay of inputs...
Page 99 - Longest response time; Conditions for the longest response time; x DP cycle time at PROFIBUS DP
Cycle and reaction times 5.3 Response time CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-17 5.3.3 Longest response time Conditions for the longest response time The figure below shows the conditions under which the longest response time is reached. Response time Whil...
Page 100 - update time or 4 x times the DP cycle time on PROFIBUS DP.; Reducing the response time with direct I/O access; Reducing the response time; with
Cycle and reaction times 5.3 Response time CPU 31xC and CPU 31x, Technical data 5-18 Manual, Edition 08/2004, A5E00105475-05 Calculation The (longest) response time is the sum of: Table 5-11 Formula: Longest response time 2 x process image transfer time for the inputs + 2 x process image transfer ti...
Page 101 - Calculating method for calculating the cycle/response time; Determine the user program runtime with the help of the
Cycle and reaction times 5.4 Calculating method for calculating the cycle/response time CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-19 5.4 Calculating method for calculating the cycle/response time Introduction This section gives you an overview of how to calculate...
Page 103 - Interrupt response time; Definition of interrupt response time
Cycle and reaction times 5.5 Interrupt response time CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-21 5.5 Interrupt response time 5.5.1 Overview Definition of interrupt response time The interrupt response time is the time that expires between the first occurrence of...
Page 104 - Table 5-14 Process/diagnostic interrupt response times; Signal modules
Cycle and reaction times 5.5 Interrupt response time CPU 31xC and CPU 31x, Technical data 5-22 Manual, Edition 08/2004, A5E00105475-05 Calculation The formula below show how you can calculate the minimum and maximum interrupt response times. Table 5-14 Process/diagnostic interrupt response times Cal...
Page 105 - Reproducibility of delay interrupts and watchdog interrupts; respective initial instructions of the interrupt OBs.; Reproducibility; The following times apply for the CPUs described in this manual:
Cycle and reaction times 5.5 Interrupt response time CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-23 Process interrupt processing Process interrupt processing begins after process interrupt OB40 is called. Higher-priority interrupts stop process interrupt processing...
Page 106 - Sample calculations; Example of cycle time calculation; digital input modules SM 321 DI 32 x 24 VDC (4 bytes each in the PI)
Cycle and reaction times 5.6 Sample calculations CPU 31xC and CPU 31x, Technical data 5-24 Manual, Edition 08/2004, A5E00105475-05 5.6 Sample calculations 5.6.1 Example of cycle time calculation Installation You have configured an S7300 and equipped it with following modules in rack "0": • ...
Page 107 - Interrupts are not processed.; Sample of response time calculation; digital input modules SM 321 DI 32 x 24 VDC (4 bytes each in the PI)
Cycle and reaction times 5.6 Sample calculations CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-25 Calculating the longest response time Longest response time: 6.8 ms x 2 = 13.6 ms. • I/O delay can be neglected. • Neither PROFIBUS DP, nor PROFINET IO are being used, s...
Page 108 - Calculating the physical cycle time; for an analog output.
Cycle and reaction times 5.6 Sample calculations CPU 31xC and CPU 31x, Technical data 5-26 Manual, Edition 08/2004, A5E00105475-05 Calculating the physical cycle time Under consideration of communication load: 12.5 ms * 100 / (100-40) = 20.8 ms. Thus, under consideration of time-sharing factors, the...
Page 109 - Example of interrupt response time calculation; Installation; Process interrupt response time of SM 321 DI 16 x 24 VDC:
Cycle and reaction times 5.6 Sample calculations CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 5-27 5.6.3 Example of interrupt response time calculation Installation You have assembled an S7-300, consisting of one CPU 314C-2 and four digital modules in the CPU rack. On...
Page 111 - Technical data of CPU 31xC; General technical data; Dimensions of CPU 31xC; Width of CPU
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 6-1 Technical data of CPU 31xC 6 6.1 General technical data 6.1.1 Dimensions of CPU 31xC Each CPU features the same height and depth, only the width dimensions differ. • Height: 125 mm • Depth: 115 mm, or 180 mm with opened...
Page 112 - Technical data of the Micro Memory Card (MMC); Plug-in SIMATIC Micro Memory Cards; The following memory modules are available:; Maximum number of loadable blocks in the MMC
Technical data of CPU 31xC 6.1 General technical data CPU 31xC and CPU 31x, Technical data 6-2 Manual, Edition 08/2004, A5E00105475-05 6.1.2 Technical data of the Micro Memory Card (MMC) Plug-in SIMATIC Micro Memory Cards The following memory modules are available: Table 6-1 Available MMCs Type Orde...
Page 117 - Technological
Technical data of CPU 31xC 6.2 CPU 312C CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 6-7 Technical data Functionality • MPI Yes • PROFIBUS DP No • Point-to-point communication No MPI Services • PG/OP communication Yes • Routing No • Global data communication Yes • S7 ...
Page 118 - In Chapter
Technical data of CPU 31xC 6.3 CPU 313C CPU 31xC and CPU 31x, Technical data 6-8 Manual, Edition 08/2004, A5E00105475-05 Technical data I 2 t 0.7 A 2 s External fusing of power supply lines (recommended) LS switch Type C min. 2 A, LS switch Type B min. 4 A Power loss Typically 6 W Reference In Chapt...
Page 124 - Technical data
Technical data of CPU 31xC 6.4 CPU 313C-2 PtP and CPU 313C-2 DP CPU 31xC and CPU 31x, Technical data 6-14 Manual, Edition 08/2004, A5E00105475-05 6.4 CPU 313C-2 PtP and CPU 313C-2 DP Technical data Table 6-5 Technical data for CPU 313C-2 PtP/ CPU 313C-2 DP Technical data CPU 313C-2 PtP CPU 313C-2 DP...
Page 130 - Technological Functions
Technical data of CPU 31xC 6.4 CPU 313C-2 PtP and CPU 313C-2 DP CPU 31xC and CPU 31x, Technical data 6-20 Manual, Edition 08/2004, A5E00105475-05 Technical data CPU 313C-2 PtP CPU 313C-2 DP Integrated functions Counters 3 channels (see the Manual Technological Functions ) Frequency counters 3 channe...
Page 138 - Technical data of the integrated I/O; Arrangement and usage of integrated I/Os; Further information on integrated I/O is found in the Manual; Technical Functions
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data 6-28 Manual, Edition 08/2004, A5E00105475-05 6.6 Technical data of the integrated I/O 6.6.1 Arrangement and usage of integrated I/Os Introduction Integrated I/Os of CPUs 31xC can be used for tech...
Page 140 - Details are found in the Manual; under; Measurement and Pulse Width Modulation
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data 6-30 Manual, Edition 08/2004, A5E00105475-05 CPU 313C, CPU 313C-2 DP/PtP, CPU 314C-2 DP/PtP: DI/DO (connectors X11 and X12) 1 234 56 8 7 9 10 11 121314 16 15 1718 20 19 Standard DI Posi- tioning ...
Page 142 - Controller
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data 6-32 Manual, Edition 08/2004, A5E00105475-05 CPU 313C/314C-2: Pin-out of the integrated AI/AO and DI (connector X11) 1 23456 8 7 9 10 11 121314 16 15 1718 20 19 Standard Positioning AI (Ch0) AI (...
Page 143 - used by technological functions is not possible.
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 6-33 Simultaneous usage of technological functions and standard I/O Technological functions and standard I/O can be used simultaneously with appropriate ha...
Page 144 - Wiring of the current/voltage inputs
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data 6-34 Manual, Edition 08/2004, A5E00105475-05 6.6.2 Analog I/O Wiring of the current/voltage inputs The figure below shows the wiring diagram of the current/voltage inputs operated with 2-/4-wire ...
Page 145 - Low-pass characteristics of the integrated filter
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 6-35 Measurement principle 31xC CPUs use the measurement principle of actual value encoding. Here, they operate with a sampling rate of 1 kHz. That is, a n...
Page 146 - Principle of interference suppression with STEP 7
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data 6-36 Manual, Edition 08/2004, A5E00105475-05 Input filters (software filter) The current / voltage inputs have a software filter for the input signals which can be programmed with STEP 7. It filt...
Page 147 - 0 Hz interference suppression
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 6-37 In the two graphics below we illustrate how the 50 Hz and 60 Hz interference suppression work 1.05 ms Value 1 Value 2 Value 3 . . . Value 19 Value 20 ...
Page 148 - 0 Hz interference suppression; filtered externally.; interference resistance for these analog inputs.
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data 6-38 Manual, Edition 08/2004, A5E00105475-05 Value 1 Value 2 Value 3 . . . Value 16 Value 17 Value 1 Value 2 Value 3 . . . Value 16 Value 17 1.05 ms 1.05 ms 1.05 ms 1.05 ms 1.05 ms 1.05 ms 1.05 m...
Page 149 - Configuration; Reference Manual; System and Standard Functions; ). Refer to the structure of record 1 for; Parameters of standard DI
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 6-39 6.6.3 Configuration Introduction You configure the integrated I/O of CPU 31xC with STEP 7. Always make these settings when the CPU is in STOP. The gen...
Page 150 - reserved
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data 6-40 Manual, Edition 08/2004, A5E00105475-05 Byte 0 7 7 7 7 7 Byte 1 Byte 2 Byte 4 Byte 5 Byte 8 7 Byte 9 7 Byte 6 00011011 : BBB B ::: 30,1 ms0,5 ms 15 ms ms 0:1: 00B 7 0 Bit-Nr. Byte 0 0 Bit-Nr...
Page 152 - Parameters of standard AO
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data 6-42 Manual, Edition 08/2004, A5E00105475-05 Parameters of standard AO The table below gives you an overview of standard analog output parameters (see also Chapter 4.3 in the Module Data Referenc...
Page 154 - Structure of record 1 for standard AI/AO (length of 13 bytes); Parameter for technological functions
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data 6-44 Manual, Edition 08/2004, A5E00105475-05 %LW1U %LW1U %\WH %\WH %\WH 0 :2 :3 :4 :8 :9 : 9 H H H H H H H 0 … 20 mA4 … 20 mA+/- 20 mA0 … 10 V+/- 10 V 0 :1 :3 : 9 H H H H Output range of channel ...
Page 155 - Interrupts; Interrupt inputs; no interrupt; Start information for OB40; Manual
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 6-45 6.6.4 Interrupts Interrupt inputs All digital inputs of the on-board I/O of CPUs 31xC can be used as interrupt inputs. You can specify interrupt behav...
Page 156 - Displaying the statuses of CPU 31xC interrupt inputs; Diagnostics; the Reference Manual; Digital inputs
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data 6-46 Manual, Edition 08/2004, A5E00105475-05 31 30 29 28 27 26 25 24 16 15 … 8 7 6 5 4 3 2 1 … Bit no. PRAL: process interrupt Inputs are designated with default addresses. reserved 23 PRAL from ...
Page 158 - Digital outputs; Technological functions use fast digital outputs.
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data 6-48 Manual, Edition 08/2004, A5E00105475-05 Technical data CPU 312C CPU 313C CPU 313C-2 CPU 314C-2 Data for the selection of an encoder for standard DI CPU 312C CPU 313C CPU 313C-2 CPU 314C-2 In...
Page 161 - Analog inputs
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 6-51 6.6.8 Analog inputs Introduction This chapter contains the specifications for analog outputs of CPUs 31xC. The table includes the following CPUs: • CP...
Page 163 - Analog outputs
Technical data of CPU 31xC 6.6 Technical data of the integrated I/O CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 6-53 Technical data Connection of signal generators • For voltage measurement Possible • For current measurement – as 2-wire measuring transducer – as 4-wi...
Page 167 - Technical data of CPU 31x; Dimensions of CPU 31x
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 7-1 Technical data of CPU 31x 7 7.1 General technical data 7.1.1 Dimensions of CPU 31x Each CPU features the same height and depth, only the width dimensions differ. • Height: 125 mm • Depth: 115 mm, or 180 mm with opened f...
Page 174 - Technical data for the CPU 314
Technical data of CPU 31x 7.3 CPU 314 CPU 31xC and CPU 31x, Technical data 7-8 Manual, Edition 08/2004, A5E00105475-05 7.3 CPU 314 Technical data for the CPU 314 Table 7-4 Technical data for the CPU 314 Technical data CPU and version Order number 6ES7314-1AF10-0AB0 • Hardware version 01 • Firmware v...
Page 188 - Common
Technical data of CPU 31x 7.5 CPU 315-2 PN/DP CPU 31xC and CPU 31x, Technical data 7-22 Manual, Edition 08/2004, A5E00105475-05 Technical data • Number of variables – Of those as status variable – Of those as control variable 30 Max. 30 Max. 14 Forcing • Variables Inputs/Outputs • Number of variable...
Page 206 - Permitted range
Technical data of CPU 31x 7.7 CPU 317-2 PN/DP CPU 31xC and CPU 31x, Technical data 7-40 Manual, Edition 08/2004, A5E00105475-05 Technical data Voltages and currents Power supply (rated value) 24 VDC • Permitted range 20.4 V to 28.8 V Current consumption (no-load operation) 100 mA Inrush current Typi...
Page 207 - Appendix; Information about upgrading to a CPU 31xC or CPU 31x; Area of applicability; Who should read this information?; as of version
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 A-1 Appendix A A.1 Information about upgrading to a CPU 31xC or CPU 31x A.1.1 Area of applicability Who should read this information? You are already using a CPU from the SIEMENS S7-300 series and now want to upgrade to a n...
Page 208 - Changed behavior of certain SFCs; communication with distributed I/O modules.
Appendix A.1 Information about upgrading to a CPU 31xC or CPU 31x CPU 31xC and CPU 31x, Technical data A-2 Manual, Edition 08/2004, A5E00105475-05 ... then please note if you upgrade to one of the following CPUs From version CPU Order number Firmware Hardware Hereafter called 312 6ES7312-1AD10-0AB0 ...
Page 209 - called in OB82. On CPUs 31xC/31x it generally works asynchronously.
Appendix A.1 Information about upgrading to a CPU 31xC or CPU 31x CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 A-3 Note If you are using SFC 56 "WR_DPARM" or SFC 57 "PARM_MOD", you should always evaluate the SFC's BUSY bit. • SFC 13 "DPNRM_DG" ...
Page 210 - STOP has also changed.
Appendix A.1 Information about upgrading to a CPU 31xC or CPU 31x CPU 31xC and CPU 31x, Technical data A-4 Manual, Edition 08/2004, A5E00105475-05 SFCs that may return other results You can ignore the following points if you only use logical addressing in your user program. When using address conver...
Page 211 - Runtimes that change while the program is running; the program will run much faster on the CPU 31xC/31x.; Converting the diagnostic addresses of DP slaves; standard sometimes require two diagnostic addresses per slave.
Appendix A.1 Information about upgrading to a CPU 31xC or CPU 31x CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 A-5 A.1.4 Runtimes that change while the program is running Runtimes that change while the program is running If you have created a user program that has bee...
Page 212 - Reusing existing hardware configurations; plug the connecting plug back into the power supply connector.
Appendix A.1 Information about upgrading to a CPU 31xC or CPU 31x CPU 31xC and CPU 31x, Technical data A-6 Manual, Edition 08/2004, A5E00105475-05 A.1.6 Reusing existing hardware configurations Reusing existing hardware configurations If you reuse the configuration of a CPU 312 IFM to 318-2 DP for a...
Page 213 - transfer a maximum of 128 bytes of consistent data.
Appendix A.1 Information about upgrading to a CPU 31xC or CPU 31x CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 A-7 A.1.8 Using consistent data areas in the process image of a DP slave system Consistent data The table below illustrates the points to consider with respe...
Page 214 - Load memory concept for the CPU 31xC/31x; be lost even in the event of a power failure or memory reset.; Routing for the CPU 31xC/31x as an intelligent slave
Appendix A.1 Information about upgrading to a CPU 31xC or CPU 31x CPU 31xC and CPU 31x, Technical data A-8 Manual, Edition 08/2004, A5E00105475-05 A.1.9 Load memory concept for the CPU 31xC/31x Load memory concept for the CPU 31xC/31x On CPUs 312 IFM to 318-2 DP, the load memory is integrated into t...
Page 215 - For data blocks for these CPUs
Appendix A.1 Information about upgrading to a CPU 31xC or CPU 31x CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 A-9 A.1.12 Changed retentive behavior for CPUs with firmware >= V2.1.0 Changed retentive behavior for CPUs with firmware >= V2.1.0 For data blocks for ...
Page 216 - interface; Procedure; corresponding blocks from the standard library.
Appendix A.1 Information about upgrading to a CPU 31xC or CPU 31x CPU 31xC and CPU 31x, Technical data A-10 Manual, Edition 08/2004, A5E00105475-05 A.1.14 Using loadable blocks for S7 communication for the integrated PROFINET interface If you have already used S7 communication via CP with loadable F...
Page 217 - Glossary; comparison, calculation and conversion operations.
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 Glossary-1 Glossary Accumulator Accumulators represent CPU register and are used as buffer memory for download, transfer, comparison, calculation and conversion operations. Address An address is the identifier of a specific...
Page 218 - interconnected via repeaters.
Glossary CPU 31xC and CPU 31x, Technical data Glossary-2 Manual, Edition 08/2004, A5E00105475-05 Backup memory Backup memory ensures buffering of the memory areas of a CPU without backup battery. It backs up a configurable number of timers, counters, flag bits, data bytes and retentive timers, count...
Page 220 - . STEP 7 assigns the local IP address to the
Glossary CPU 31xC and CPU 31x, Technical data Glossary-4 Manual, Edition 08/2004, A5E00105475-05 Data, temporary Temporary data represent local data of a block. They are stored in the L-stack when the block is executed. After the block has been processed, these data are no longer available. Default ...
Page 222 - calculations. They can be accessed in bit, word or dword operations.
Glossary CPU 31xC and CPU 31x, Technical data Glossary-6 Manual, Edition 08/2004, A5E00105475-05 Error response Reaction to a runtime error. Reactions of the operating system: It sets the automation system to STOP, indicates the error, or calls an OB in which the user can program a reaction. ERTEC S...
Page 224 - on which dangerous fault-voltage cannot occur.
Glossary CPU 31xC and CPU 31x, Technical data Glossary-8 Manual, Edition 08/2004, A5E00105475-05 Chassis ground is the totality of all the interconnected passive parts of a piece of equipment on which dangerous fault-voltage cannot occur. GSD file The properties of a PROFINET device are described in...
Page 226 - The address of the node (generally called the host or network node).
Glossary CPU 31xC and CPU 31x, Technical data Glossary-10 Manual, Edition 08/2004, A5E00105475-05 IO device See PROFINET IO Controller See PROFINET IO Device See PROFINET IO Supervisor See PROFINET IO System IO supervisor See PROFINET IO Controller See PROFINET IO Device See PROFINET IO Supervisor S...
Page 230 - block will be processed according to interrupt priority.
Glossary CPU 31xC and CPU 31x, Technical data Glossary-14 Manual, Edition 08/2004, A5E00105475-05 Process interrupt A process interrupt is triggered by interrupt-triggering modules as a result of a specific event in the process. The process interrupt is reported to the CPU. The assigned organization...
Page 232 - PROFINET or PROFIBUS devices.
Glossary CPU 31xC and CPU 31x, Technical data Glossary-16 Manual, Edition 08/2004, A5E00105475-05 PROFINET IO Within the framework of PROFINET, PROFINET IO is a communication concept for the implementation of modular, distributed applications. PROFINET IO allows you to create automation solutions, w...
Page 234 - starting at the first instruction in OB1.
Glossary CPU 31xC and CPU 31x, Technical data Glossary-18 Manual, Edition 08/2004, A5E00105475-05 Restart On CPU start-up (e.g. after is switched from STOP to RUN mode via selector switch or with POWER ON), OB100 (restart) is initially executed, prior to cyclic program execution (OB1). On restart, t...
Page 236 - SIMATIC S7 controllers.
Glossary CPU 31xC and CPU 31x, Technical data Glossary-20 Manual, Edition 08/2004, A5E00105475-05 STEP 7 Engineering system. Contains programming software for the creation of user programs for SIMATIC S7 controllers. Subnet mask The bits set in the subnet mask decides the part of the IP address that...
Page 239 - transmission networks.
Glossary CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 Glossary-23 WAN Network with a span beyond that of a local area network allowing, for example, intercontinental operation. Legal rights do not belong to the user but to the provider of the transmission networks.
Page 241 - Index
CPU 31xC and CPU 31x, Technical data Manual, Edition 08/2004, A5E00105475-05 Index-1 Index A Aim of this Documentation, iii Analog inputs Configuration, 6-41 Not connected, 6-38 Technical data, 6-51 Analog outputs Not connected, 6-38 Technical data, 6-53 Applicability of this manual, A-1, A-2 Applic...