Intel IXP12xx - Manual

Intel IXP12xx

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Table of Contents:

  • Page 3 – OVERVIEW; For use with the IXP1240/1250 with hardware CRC capability; external; MEASUREMENT ENVIRONMENT; Alternate DRAM Timing
  • Page 4 – KEY WORKLOADS & APPROACHES TO TESTING THE EXAMPLE DESIGN; Protocol Performance of IP over ATM vs. Ethernet; Figure 1 – Protocol Processing
  • Page 5 – Figure 2 – Frame and PDU Length versus IP Packet Length; Figure 3 – Expected Ethernet Transmit Bandwidth
  • Page 6 – Multiple Cells/PDU Workload; CYCLE AND INSTRUCTION BUDGETS; Cycle Budgets to support Line Rates
  • Page 7 – Virtual Circuits; interleaved; next pipeline stage falls behind.
  • Page 8 – SIMULATION MEASUREMENT PROCEDURE AND RESULTS; Simulated 29-byte packet performance
  • Page 9 – Simulated 40-byte and 1500-byte packet performance; HARDWARE MEASUREMENT PROCEDURE AND RESULTS; Hardware Measurement Results
  • Page 10 – Hardware 29-byte packet performance; Figure 5 – Single-cell/PDU Performance using 133MHZ DRAM
  • Page 11 – Figure 6 – Single-cell/PDU Performance using 143MHz DRAM; Hardware 40-byte packet performance; Figure 7 – Two-cell PDU Performance on 133MHZ DRAM
  • Page 12 – Figure 8 – Two-cell/PDU Performance on 143MHZ DRAM; Hardware 1500-byte packet performance; Figure 9 – 32-cell/PDU Performance on 133MHz DRAM; StrongARM CORE PERFORMANCE
  • Page 14 – RESOURCE UTILIZATION AND HEADROOM ANALYSIS; Microengine Register and Microstore Headroom; Figure 12 – Microengine register and microstore headroom
  • Page 16 – Configuration; Figure 13 – SRAM and SDRAM bandwidth headroom
  • Page 17 – APPENDIX; Buffer Allocation in DRAM; ordered
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IXP12xx ATM OC12/Ethernet IP
Router Example Design

Performance and Headroom Analysis

April, 2002

Document Number: 301144-001

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Summary

Page 3 - OVERVIEW; For use with the IXP1240/1250 with hardware CRC capability; external; MEASUREMENT ENVIRONMENT; Alternate DRAM Timing

Version 1.0, 4/10/02 Page 3 of 17 IXP12xx ATM OC12/Ethernet IP Router Example Design Performance and Headroom Analysis OVERVIEW This documents details the performance and headroom analysis done on the IXP12xx ATM OC12 / Ethernet IP Router Example Design. It covers the general performance aspects of ...

Page 4 - KEY WORKLOADS & APPROACHES TO TESTING THE EXAMPLE DESIGN; Protocol Performance of IP over ATM vs. Ethernet; Figure 1 – Protocol Processing

Version 1.0, 4/10/02 Page 4 of 17 KEY WORKLOADS & APPROACHES TO TESTING THE EXAMPLE DESIGN Protocol Performance of IP over ATM vs. Ethernet Figure 1 details the protocol processing required to carry an IP packet over ATM and Ethernet. . Figure 1 – Protocol Processing Figures 2 and 3 show that as...

Page 5 - Figure 2 – Frame and PDU Length versus IP Packet Length; Figure 3 – Expected Ethernet Transmit Bandwidth

Version 1.0, 4/10/02 Page 5 of 17 The result is that ATM is significantly more efficient that Ethernet in terms of Mbps for carrying very small PDUs. Every Mbps of single-cell-PDUs on the ATM link requires (84/55) Mbps on the matching Ethernet link(s). 0 16 32 48 64 80 96 112 128 144 160 176 0 20 40...

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