Cypress STK15C88 - Manual

Cypress STK15C88

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Table of Contents:

  • Page 2 – Pin Configurations
  • Page 4 – Hardware Protect; Noise Considerations; Low Average Active Power; Figure 2; Best Practices
  • Page 6 – DC Electrical Characteristics
  • Page 7 – Thermal Resistance; AC Test Conditions
  • Page 8 – AC Switching Characteristics; SRAM Read Cycle; Switching Waveforms
  • Page 10 – AutoStore or Power Up RECALL; Power up RECALL Duration
  • Page 12 – Ordering Information; Commercial; Part Numbering Nomenclature; Lead Finish
  • Page 13 – Package Diagrams
  • Page 15 – Worldwide Sales and Design Support; Change
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STK15C88

256 Kbit (32K x 8) PowerStore nvSRAM

Cypress Semiconductor Corporation

198 Champion Court

San Jose

,

CA 95134-1709

408-943-2600

Document Number: 001-50593 Rev. **

Revised January 29, 2009

Features

25 ns and 45 ns access times

Pin compatible with industry standard SRAMs

Automatic nonvolatile STORE on power loss

Nonvolatile STORE under Software control

Automatic RECALL to SRAM on power up

Unlimited Read/Write endurance

Unlimited RECALL cycles

1,000,000 STORE cycles

100 year data retention

Single 5V+10% power supply

Commercial and Industrial Temperatures

28-pin (300 mil and 330 mil) SOIC packages

RoHS compliance

Functional Description

The Cypress STK15C88 is a 256Kb fast static RAM with a
nonvolatile element in each memory cell. The embedded
nonvolatile elements incorporate QuantumTrap

technology

producing the world’s most reliable nonvolatile memory. The
SRAM provides unlimited read and write cycles, while
independent, nonvolatile data resides in the highly reliable
QuantumTrap cell. Data transfers from the SRAM to the
nonvolatile elements (the STORE operation) takes place
automatically at power down. On power up, data is restored to
the SRAM (the RECALL operation) from the nonvolatile
memory. Both the STORE and RECALL operations are also
available under software control.

PowerStore nvSRAM products depend on the intrinsic system
capacitance to maintain system power long enough for an
automatic store on power loss. If the power ramp from 5 volts
to 3.6 volts is faster than 10 ms, consider our 14C88 or 16C88
for more reliable operation.

Logic Block Diagram

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Summary

Page 2 - Pin Configurations

STK15C88 Document Number: 001-50593 Rev. ** Page 2 of 15 Pin Configurations Figure 1. Pin Diagram - 28-Pin SOIC Table 1. Pin Definitions - 28-Pin SOIC Pin Name Alt IO Type Description A 0 –A 14 Input Address Inputs. Used to select one of the 32,768 bytes of the nvSRAM. DQ 0 -DQ 7 Input or Output Bid...

Page 4 - Hardware Protect; Noise Considerations; Low Average Active Power; Figure 2; Best Practices

STK15C88 Document Number: 001-50593 Rev. ** Page 4 of 15 Hardware Protect The STK15C88 offers hardware protection against inadvertentSTORE operation and SRAM WRITEs during low voltage conditions. When V CAP <V SWITCH , all externally initiated STORE operations and SRAM WRITEs are inhibited. Noise...

Page 6 - DC Electrical Characteristics

STK15C88 Document Number: 001-50593 Rev. ** Page 6 of 15 Maximum Ratings Exceeding maximum ratings may shorten the useful life of thedevice. These user guidelines are not tested. Storage Temperature ................................. –65 ° C to +150 ° C Temperature under bias ...........................

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