Cypress STK11C68-5 - Manual
Cypress STK11C68-5 – Manual, read for free online in PDF format. We hope this helps you resolve any issues you may have. If you have further questions, please contact us through the contact form.
Table of Contents:
- Page 4 – Low Average Active Power; Figure 3; Best Practices; Table 1. Hardware Mode Selection
- Page 5 – DC Electrical Characteristics
- Page 6 – Thermal Resistance; Parameter; Figure 5. AC Test Loads; AC Test Conditions
- Page 7 – AC Switching Characteristics; SRAM Read Cycle; Switching Waveforms
- Page 8 – SRAM Write Cycle
- Page 9 – AutoStore INHIBIT or Power Up RECALL; Power up RECALL Duration
- Page 11 – Part Numbering Nomenclature; Retention / Endurance
- Page 12 – Ordering Information; Ordering Code; Military
- Page 13 – Package Diagrams
- Page 15 – Document History Page; Worldwide Sales and Design Support; Submission
STK11C68-5 (SMD5962-92324)
64 Kbit (8K x 8) SoftStore nvSRAM
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Document Number: 001-51001 Rev. *A
Revised April 07, 2009
Features
■
35 ns, 45 ns, and 55 ns access times
■
Pin compatible with industry standard SRAMs
■
Software initiated nonvolatile STORE
■
Unlimited Read and Write endurance
■
Automatic RECALL to SRAM on power up
■
Unlimited RECALL cycles
■
1,000,000 STORE cycles
■
100 year data retention
■
Single 5V ± 10% operation
■
Military temperature
■
28-pin (300 mil) CDIP and 28-pad LCC packages
Functional Description
The Cypress STK11C68-5 is a 64 Kb fast static RAM with a
nonvolatile element in each memory cell. The embedded
nonvolatile elements incorporate QuantumTrap technology to
produce the world’s most reliable nonvolatile memory. The
SRAM provides unlimited read and write cycles, while
independent nonvolatile data resides in the highly reliable
QuantumTrap cell. Data transfers under software control from
SRAM to the nonvolatile elements (the STORE operation). On
power up, data is automatically restored to the SRAM (the
RECALL operation) from the nonvolatile memory. RECALL
operations are also available under software control.
STORE/
RECALL
CONTROL
POWER
CONTROL
SOFTWARE
DETECT
STATIC RAM
ARRAY
128 X 512
Quantum Trap
128 X 512
STORE
RECALL
COLUMN I/O
COLUMN DEC
ROW DECODER
INPUT
BUFFERS
OE
CE
WE
HSB
V
CC
V
CAP
A
0
-
A
12
A
0
A
1
A
2
A
3
A
4
A
10
A
5
A
6
A
7
A
8
A
9
A
11
A
12
DQ
0
DQ
1
DQ
2
DQ
3
DQ
4
DQ
5
DQ
6
DQ
7
Logic Block Diagram
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Summary
STK11C68-5 (SMD5962-92324) Document Number: 001-51001 Rev. *A Page 4 of 15 Low Average Active Power CMOS technology provides the STK11C68-5 the benefit ofdrawing significantly less current when it is cycled at times longerthan 50 ns. Figure 3 and Figure 4 shows the relationship between I CC and Read...
STK11C68-5 (SMD5962-92324) Document Number: 001-51001 Rev. *A Page 5 of 15 Maximum Ratings Exceeding maximum ratings may shorten the useful life of thedevice. These user guidelines are not tested. Storage Temperature ................................. –65 ° C to +150 ° C Temperature under bias..........
STK11C68-5 (SMD5962-92324) Document Number: 001-51001 Rev. *A Page 6 of 15 Thermal Resistance In this table, the thermal resistance parameters are listed. [3] Parameter Description Test Conditions 28-CDIP 28-LCC Unit Θ JA Thermal Resistance(Junction to Ambient) Test conditions follow standard test m...
