Cypress CY8C24994 - Manual

Cypress CY8C24994

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Table of Contents:

  • Page 2 – PSoC Functional Overview; The Digital System; Figure 3-1. Digital System Block Diagram; DIGITAL SYSTEM
  • Page 3 – The Analog System; Figure 3-2. Analog System Block Diagram
  • Page 5 – Development Tools; PSoC Designer Software Subsystems; C Language Compilers.
  • Page 6 – Designing with PSoC Designer; Select Components
  • Page 7 – Document Conventions; Units of Measure; Acronym
  • Page 8 – See LEGEND details and footnotes in; on page 9; QFN
  • Page 11 – Note
  • Page 16 – TQ F P; O CDE
  • Page 17 – Register Reference; PSoC Programmable System-on-Chip Technical Reference Manual; Register Conventions
  • Page 18 – Register Map Bank 0 Table: User Space
  • Page 19 – Register Map Bank 1 Table: Configuration Space
  • Page 20 – Electrical Specifications; Figure 10-1. Voltage versus CPU Frequency; CPU Frequency
  • Page 21 – Thermal Impedance
  • Page 22 – DC Electrical Characteristics
  • Page 23 – DC Operational Amplifier Specifications
  • Page 24 – DC Low Power Comparator Specifications
  • Page 25 – DC Analog Output Buffer Specifications
  • Page 26 – DC Analog Reference Specifications
  • Page 27 – DC Analog PSoC Block Specifications
  • Page 28 – Technical Reference Manual
  • Page 30 – AC Electrical Characteristics
  • Page 32 – AC Operational Amplifier Specifications
  • Page 34 – AC Low Power Comparator Specifications
  • Page 35 – AC Analog Output Buffer Specifications
  • Page 37 – C Specifications; SDA
  • Page 38 – Packaging Dimensions; and solder reflow peak temperatures.; Important Note; the emulation tools’ dimensions, refer to the document titled
  • Page 42 – Development Tool Selection; Development Kits
  • Page 43 – Device Programmers; Build a PSoC Emulator into Your Board; Table 12-1. Emulation and Programming Accessories
  • Page 44 – Ordering Information
  • Page 45 – Ordering Code Definitions; CY
  • Page 46 – Document History Page; Date
  • Page 47 – Worldwide Sales and Design Support
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CY8C24094, CY8C24794
CY8C24894, CY8C24994

PSoC

®

Programmable System-on-Chip™

Cypress Semiconductor Corporation

198 Champion Court

San Jose

,

CA 95134-1709

408-943-2600

Document Number: 38-12018 Rev. *M

Revised February 10, 2009

1. Features

XRES Pin to Support In-System Serial Programming (ISSP)

and External Reset Control in CY8C24894

Powerful Harvard Architecture Processor

M8C Processor Speeds to 24 MHz

Two 8x8 Multiply, 32-Bit Accumulate

Low Power at High Speed

3V to 5.25V Operating Voltage

Industrial Temperature Range: -40°C to +85°C

USB Temperature Range: -10°C to +85°C

Advanced Peripherals (PSoC

®

Blocks)

6 Rail-to-Rail Analog PSoC Blocks Provide:
• Up to 14-Bit ADCs
• Up to 9-Bit DACs
• Programmable Gain Amplifiers
• Programmable Filters and Comparators

4 Digital PSoC Blocks Provide:
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Full-Duplex UART
• Multiple SPI

Masters or Slaves

• Connectable to all GPI/O Pins

Complex Peripherals by Combining Blocks

Capacitive Sensing Application Capability

Full Speed USB (12 Mbps)

Four Uni-Directional Endpoints

One Bi-Directional Control Endpoint

USB 2.0 Compliant

Dedicated 256 Byte Buffer

No External Crystal Required

Flexible On-Chip Memory

16K Flash Program Storage 50,000 Erase and Write Cycles

1K SRAM Data Storage

In-System Serial Programming (ISSP)

Partial Flash Updates

Flexible Protection Modes

EEPROM Emulation in Flash

Programmable Pin Configurations

25 mA Sink, 10 mA Drive on all GPI/O

Pull Up, Pull Down, High Z, Strong, or Open Drain Drive

Modes on all GPI/O

Up to 48 Analog Inputs on GPI/O

Two 33 mA Analog Outputs on GPI/O

Configurable Interrupt on all GPI/O

Precision, Programmable Clocking

Internal ±4% 24 and 48 MHz Oscillator

Internal Oscillator for Watchdog and Sleep

0.25% Accuracy for USB with no External Components

Additional System Resources

I

2

C Slave, Master, and Multi-Master to 400 kHz

Watchdog and Sleep Timers

User Configurable Low Voltage Detection

D I G I T A L S Y S T E M

S R A M

1 K

I n t e r r u p t

C o n t r o l l e r

S l e e p a n d
W a t c h d o g

C l o c k S o u r c e s

( I n c l u d e s I M O a n d I L O )

G l o b a l D i g i t a l I n t e r c o n n e c t

G l o b a l A n a l o g I n t e r c o n n e c t

P S o C C O R E

C P U C o r e ( M 8 C )

S R O M

F l a s h 1 6 K

D i g i t a l

B l o c k

A r r a y

D i g i t a l

C l o c k s

S Y S T E M R E S O U R C E S

A N A L O G S Y S T E M

A n a l o g

R e f .

P o r t 5

P o r t 4

P o r t 3

P o r t 2

P o r t 1

P o r t 0

A n a l o g
D r i v e r s

A n a l o g

B l o c k

A r r a y

I n t e r n a l
V o l t a g e

R e f .

P O R a n d L V D

S y s t e m R e s e t s

2

M A C s

D e c i m a t o r

T y p e 2

I 2 C

U S B

P o r t 7

S

ys

te

m

B

u

s

A n a l o g

I n p u t

M u x i n g

2. Logic Block Diagram

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Summary

Page 2 - PSoC Functional Overview; The Digital System; Figure 3-1. Digital System Block Diagram; DIGITAL SYSTEM

CY8C24094, CY8C24794CY8C24894, CY8C24994 Document Number: 38-12018 Rev. *M Page 2 of 47 3. PSoC Functional Overview The PSoC family consists of many Mixed-Signal Array with On-Chip Controller devices. All PSoC family devices are designed to replace traditional MCUs, system ICs, and the numerous disc...

Page 3 - The Analog System; Figure 3-2. Analog System Block Diagram

CY8C24094, CY8C24794CY8C24894, CY8C24994 Document Number: 38-12018 Rev. *M Page 3 of 47 3.1 The Analog System The Analog System is composed of 6 configurable blocks, each comprised of an opamp circuit allowing the creation of complex analog signal flows. Analog peripherals are very flexible and can ...

Page 5 - Development Tools; PSoC Designer Software Subsystems; C Language Compilers.

CY8C24094, CY8C24794CY8C24894, CY8C24994 Document Number: 38-12018 Rev. *M Page 5 of 47 5. Development Tools PSoC Designer is a Microsoft ® Windows-based, integrated development environment for the Programmable System-on-Chip (PSoC) devices. The PSoC Designer IDE runs on Windows XP or Windows Vista....

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