Cypress CY8C24123A - Manual

Cypress CY8C24123A

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Table of Contents:

  • Page 2 – Figure 1; PSoC Core; Figure 1. Digital System Block Diagram; Table 1; To System Bus; Digital PSoC Block Array; To Analog
  • Page 3 – Analog System; Figure 2; Figure 2. Analog System Block Diagram
  • Page 4 – Getting Started; , click the Online Store shopping cart; Table 1. PSoC Device Characteristics
  • Page 5 – Development Tools; Figure 3; Figure 3. PSoC Designer Subsystems; PSoC Designer Software Subsystems; Device Editor; an; PSoC
  • Page 6 – Hardware Tools; Designing with User Modules; Figure 4. User Module and Source Code Development Flows; Debugger
  • Page 7 – Document Conventions; Acronyms Used; Electrical Specifications; Numeric Naming
  • Page 8 – Pinouts; LEGEND; Vss
  • Page 9 – END; SMP; PDIP
  • Page 11 – QFN
  • Page 12 – SSOP
  • Page 14 – Register Reference; PSoC Programmable; Register Conventions; Abbreviations Used; Register Mapping Tables; Note; In the following register mapping tables, blank fields are; Table 8. Abbreviations; Access is bit specific
  • Page 15 – Table 9. Register Map Bank 0 Table: User Space
  • Page 17 – Table 10. Register Map Bank 1 Table: Configuration Space
  • Page 18 – SLI
  • Page 19 – STG
  • Page 20 – DC Electrical Characteristics; DC Chip-Level Specifications
  • Page 21 – DC General Purpose IO Specifications
  • Page 22 – DC Operational Amplifier Specifications
  • Page 24 – DC Low Power Comparator Specifications
  • Page 25 – DC Analog Output Buffer Specifications
  • Page 26 – DC Switch Mode Pump Specifications
  • Page 27 – Battery; V dd
  • Page 28 – DC Analog Reference Specifications
  • Page 30 – CT; a. Always greater than 50 mV above V; b. Always greater than 50 mV above V; c. Always greater than 50 mV above
  • Page 31 – DC Programming Specifications; at
  • Page 32 – AC Electrical Characteristics; AC Chip-Level Specifications
  • Page 35 – AC General Purpose IO Specifications; GPIO
  • Page 36 – AC Operational Amplifier Specifications
  • Page 38 – Figure 21. Typical Opamp Noise
  • Page 39 – RLPC
  • Page 41 – AC Analog Output Buffer Specifications
  • Page 42 – AC External Clock Specifications
  • Page 44 – SDA
  • Page 45 – Packaging Information; Important Note; the emulation tools’ dimensions, refer to the document titled; Packaging Dimensions; DIMENSIONS IN INCHES MIN.
  • Page 49 – PAD
  • Page 50 – S O L D E R A B L E
  • Page 52 – Development Tool Selection; Software
  • Page 53 – Device Programmers; Third Party Tools; Table 53. Emulation and Programming Accessories
  • Page 54 – Ordering Information; Ordering Code Definitions; Part Number
  • Page 55 – Document History Page; ECN
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CY8C24123A

CY8C24223A, CY8C24423A

PSoC

®

Programmable System-on-Chip™

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

,

CA 95134-1709

•

408-943-2600

Document Number: 38-12028 Rev. *I

Revised December 11, 2008

Features

■

Powerful Harvard Architecture Processor

❐

M8C Processor Speeds to 24 MHz

❐

8x8 Multiply, 32-Bit Accumulate

❐

Low Power at High Speed

❐

2.4 to 5.25V Operating Voltage

❐

Operating Voltages Down to 1.0V Using On-Chip Switch
Mode Pump (SMP)

❐

Industrial Temperature Range: -40°C to +85°C

■

Advanced Peripherals (PSoC Blocks)

❐

Six Rail-to-Rail Analog PSoC Blocks Provide:
• Up to 14-Bit ADCs
• Up to 9-Bit DACs
• Programmable Gain Amplifiers
• Programmable Filters and Comparators

❐

Four Digital PSoC Blocks Provide:
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Full-Duplex UART
• Multiple SPI

™

Masters or Slaves

• Connectable to All GPIO Pins

❐

Complex Peripherals by Combining Blocks

■

Precision, Programmable Clocking

❐

Internal ±2.5% 24/48 MHz Oscillator

❐

High accuracy 24 MHz with optional 32 kHz Crystal and PLL

❐

Optional External Oscillator, up to 24 MHz

❐

Internal Oscillator for Watchdog and Sleep

■

Flexible On-Chip Memory

❐

4K Flash Program Storage 50,000 Erase/Write Cycles

❐

256 Bytes SRAM Data Storage

❐

In-System Serial Programming (ISSP)

❐

Partial Flash Updates

❐

Flexible Protection Modes

❐

EEPROM Emulation in Flash

■

Programmable Pin Configurations

❐

25 mA Sink on all GPIO

❐

Pull Up, Pull Down, High Z, Strong, or Open Drain Drive
Modes on All GPIO

❐

Up to Ten Analog Inputs on GPIO

❐

Two 30 mA Analog Outputs on GPIO

❐

Configurable Interrupt on All GPIO

■

New CY8C24x23A PSoC Device

❐

Derived From the CY8C24x23 Device

❐

Low Power and Low Voltage (2.4V)

■

Additional System Resources

❐

I

2

C

™

Slave, Master, and MultiMaster to 400 kHz

❐

Watchdog and Sleep Timers

❐

User-Configurable Low Voltage Detection

❐

Integrated Supervisory Circuit

❐

On-Chip Precision Voltage Reference

■

Complete Development Tools

❐

Free Development Software (PSoC Designer™)

❐

Full-Featured, In-Circuit Emulator, and Programmer

❐

Full Speed Emulation

❐

Complex Breakpoint Structure

❐

128K Trace Memory

DIGITAL SYSTEM

SRAM

256 Bytes

Interrupt

Controller

Sleep and
Watchdog

Multiple Clock Sources

(Includes IMO, ILO, PLL, and ECO)

Global Digital Interconnect

Global Analog Interconnect

PSoC CORE

CPU Core (M8C)

SROM

Flash 4K

Digital

Block

Array

Multiply

Accum.

Switch

Mode

Pump

Internal
Voltage

Ref.

Digital

Clocks

POR and LVD

System Resets

Decimator

SYSTEM RESOURCES

ANALOG SYSTEM

Analog

Ref

Analog

Input

Muxing

I

2

C

Port 2

Port 1

Port 0

Analog
Drivers

System Bus

Analog

Block

Array

Logic Block Diagram

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Summary

Page 2 - Figure 1; PSoC Core; Figure 1. Digital System Block Diagram; Table 1; To System Bus; Digital PSoC Block Array; To Analog

CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-12028 Rev. *I Page 2 of 56 PSoC ® Functional Overview The PSoC family consists of many Mixed-Signal Array withOn-Chip Controller devices. These devices are designed toreplace multiple traditional MCU-based system components witha low cost single-...

Page 3 - Analog System; Figure 2; Figure 2. Analog System Block Diagram

CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-12028 Rev. *I Page 3 of 56 Analog System The Analog System consists of six configurable blocks, eachconsisting of an opamp circuit that allows the creation of complexanalog signal flows. Analog peripherals are very flexible and canbe customized t...

Page 4 - Getting Started; , click the Online Store shopping cart; Table 1. PSoC Device Characteristics

CY8C24123A CY8C24223A, CY8C24423A Document Number: 38-12028 Rev. *I Page 4 of 56 Additional System Resources System Resources, some of which are listed in the previoussections, provide additional capability useful to completesystems. Additional resources include a multiplier, decimator,switch mode p...

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