Cypress CY8C21634 - Manual

Cypress CY8C21634

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Table of Contents:

  • Page 2 – PSoC Functional Overview; Figure 1; The PSoC Core; Table 1; Figure 1. Digital System Block Diagram; DIGITAL SYSTEM
  • Page 3 – The Analog System; PSoC Programmable System-on-ChipTM Technical; Figure 2. Analog System Block Diagram; The Analog Multiplexer System; Additional System Resources; Array
  • Page 4 – Getting Started; Table 1. PSoC Device Characteristics
  • Page 5 – Development Tools; PSoC Designer Software Subsystems; Hybrid Designs; C Language Compilers.; Debugger
  • Page 6 – Designing with PSoC Designer; Select Components
  • Page 7 – Document Conventions; Acronyms Used; Table 2; Numeric Naming; Table 2. Acronyms Used
  • Page 8 – Pin Information; SOIC; Type
  • Page 9 – SSOP
  • Page 11 – QFN
  • Page 15 – Register Reference; PSoC Programmable; Register Conventions; The register conventions specific to this section are listed in; Register Mapping Tables; Access is bit specific; Table 9. Register Map 0 Table: User Space
  • Page 17 – Table 10. Register Map 1 Table: Configuration Space
  • Page 18 – Electrical Specifications; IM
  • Page 19 – DC Chip-Level Specifications; Operating Temperature
  • Page 20 – DC General Purpose IO Specifications
  • Page 21 – DC Operational Amplifier Specifications
  • Page 25 – DC Programming Specifications
  • Page 26 – AC Electrical Characteristics; AC Chip-Level Specifications
  • Page 30 – AC External Clock Specifications
  • Page 31 – AC Programming Specifications
  • Page 34 – Packaging Information; Important Note; the emulation tools’ dimensions, refer to the document titled; Packaging Dimensions
  • Page 38 – Thermal Impedances; Table 40. Thermal Impedances per Package
  • Page 39 – Solder Reflow Peak Temperature; Table 41. Solder Reflow Peak Temperature
  • Page 40 – Development Tool Selection; Software; PSoC Designer; Development Kits; CY3210-ExpressDK PSoC Express Development Kit; Evaluation Tools
  • Page 41 – Device Programmers; Build a PSoC Emulator into Your Board; Table 42. Emulation and Programming Accessories
  • Page 42 – Ordering Information
  • Page 43 – Ordering Code Definitions
  • Page 44 – Document History Page; Change
  • Page 45 – Worldwide Sales and Design Support
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CY8C21634, CY8C21534

CY8C21434, CY8C21334, CY8C21234

PSoC

®

Programmable System-on-Chip™

Cypress Semiconductor Corporation

198 Champion Court

San Jose

,

CA 95134-1709

408-943-2600

Document Number: 38-12025 Rev. *O

Revised April 06, 2009

Features

Powerful Harvard Architecture Processor

M8C Processor Speeds to 24 MHz

Low power at high speed

2.4V to 5.25V Operating Voltage

Operating Voltages Down to 1.0V using On-Chip Switch

Mode Pump (SMP)

Industrial Temperature Range: -40°C to +85°C

Advanced Peripherals (PSoC

®

Blocks)

4 Analog Type “E” PSoC Blocks provide:
• 2 Comparators with DAC Refs
• Single or Dual 8-Bit 28 Channel ADC

4 Digital PSoC Blocks provide:
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Full-Duplex UART, SPI

Master or Slave

• Connectable to All GPIO Pins

Complex Peripherals by Combining Blocks

Flexible On-Chip Memory

8K Flash Program Storage 50,000 Erase/Write Cycles

512 Bytes SRAM Data Storage

In-System Serial Programming (ISSP)

Partial Flash Updates

Flexible Protection Modes

EEPROM Emulation in Flash

Complete Development Tools

Free Development Software

(PSoC Designer™)

Full-Featured, In-Circuit Emulator and Programmer

Full Speed Emulation

Complex Breakpoint Structure

128K Trace Memory

Precision, Programmable Clocking

Internal ±2.5% 24/48 MHz Oscillator

Internal Oscillator for Watchdog and Sleep

Programmable Pin Configurations

25 mA Sink, 10 mA Drive on All GPIO

Pull Up, Pull Down, High Z, Strong, or Open Drain Drive

Modes on All GPIO

Up to 8 Analog Inputs on GPIO

Configurable Interrupt on All GPIO

Versatile Analog Mux

Common Internal Analog Bus

Simultaneous Connection of IO Combinations

Capacitive Sensing Application Capability

Additional System Resources

I

2

C Master, Slave and Multi-Master to 400 kHz

Watchdog and Sleep Timers

User-Configurable Low Voltage Detection

Integrated Supervisory Circuit

On-Chip Precision Voltage Reference

Logic Block Diagram

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Summary

Page 2 - PSoC Functional Overview; Figure 1; The PSoC Core; Table 1; Figure 1. Digital System Block Diagram; DIGITAL SYSTEM

CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234 Document Number: 38-12025 Rev. *O Page 2 of 45 PSoC Functional Overview The PSoC family consists of many Mixed-Signal Array with On-Chip Controller devices. These devices are designed to replace multiple traditional MCU-based system components wit...

Page 3 - The Analog System; PSoC Programmable System-on-ChipTM Technical; Figure 2. Analog System Block Diagram; The Analog Multiplexer System; Additional System Resources; Array

CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234 Document Number: 38-12025 Rev. *O Page 3 of 45 The Analog System The Analog System consists of 4 configurable blocks that allow the creation of complex analog signal flows. Analog peripherals are very flexible and may be customized to support spec...

Page 4 - Getting Started; Table 1. PSoC Device Characteristics

CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234 Document Number: 38-12025 Rev. *O Page 4 of 45 PSoC Device Characteristics Depending on your PSoC device characteristics, the digital and analog systems can have 16, 8, or 4 digital blocks and 12, 6, or 4 analog blocks. Table 1 lists the resources...

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