Cypress CY7C64215 - Manual

Cypress CY7C64215

Cypress CY7C64215 – Manual, read for free online in PDF format. We hope this helps you resolve any issues you may have. If you have further questions, please contact us through the contact form.

1 Page 1
2 Page 2
3 Page 3
4 Page 4
5 Page 5
6 Page 6
7 Page 7
8 Page 8
9 Page 9
10 Page 10
11 Page 11
12 Page 12
13 Page 13
14 Page 14
15 Page 15
16 Page 16
17 Page 17
18 Page 18
19 Page 19
20 Page 20
21 Page 21
22 Page 22
23 Page 23
24 Page 24
25 Page 25
26 Page 26
27 Page 27
28 Page 28
29 Page 29
30 Page 30
Page: / 30

Table of Contents:

  • Page 2 – Figure; enCoRe III Core; Figure 1. Digital System Block Diagram
  • Page 3 – The Analog System; Figure 2; Figure 2. Analog System Block Diagram; The Analog Multiplexer System; Additional System Resources; Getting Started; Table 1. enCoRe III Device Characteristics; Part
  • Page 4 – Development Kits; Development Tools; Figure 3. PSoC Designer Subsystems; PSoC Designer Software Subsystems; Device Editor; PSoC
  • Page 5 – Application Editor; C Language Compiler.; Debugger; Hardware Tools; Designing with User Modules
  • Page 6 – Figure 4. User Module and Source Code Development Flows; De bugge r
  • Page 7 – Document Conventions; Acronyms Used; Table 5; Numeric Naming; Acronym
  • Page 8 – M LF
  • Page 9 – SSOP
  • Page 10 – Register Reference; Register Mapping Tables; Note; In the following register mapping tables, blank fields are; Table 4. Register Conventions; Access is bit specific
  • Page 11 – Register Map Bank 0 Table: User Space
  • Page 12 – Register Map Bank 1 Table: Configuration Space
  • Page 13 – Electrical Specifications; CPU Frequency
  • Page 14 – “Thermal Impedance”
  • Page 15 – DC Electrical Characteristics; DC Chip-Level Specifications
  • Page 17 – DC Analog Reference Specifications
  • Page 18 – DC Analog enCoRe III Block Specifications
  • Page 20 – DC Programming Specifications
  • Page 21 – AC Electrical Characteristics; AC Chip-Level Specifications
  • Page 22 – GPIO
  • Page 24 – AC Analog Output Buffer Specifications
  • Page 27 – Packaging Information; Important Note; the emulation tools’ dimensions, refer to the document titled; Package Diagrams
  • Page 29 – Bake Temperature; Bake Time
  • Page 30 – Document History Page; Worldwide Sales and Design Support; Submission
Loading the manual

CY7C64215

enCoRe™ III Full Speed USB Controller

Cypress Semiconductor Corporation

198 Champion Court

San Jose

,

CA 95134-1709

408-943-2600

Document 38-08036 Rev. *C

Revised December 08, 2008

Features

Powerful Harvard Architecture Processor

M8C Processor Speeds to 24 MHz

Two 8x8 Multiply, 32-bit Accumulate

3.0V to 5.25V Operating Voltage

USB 2.0 USB-IF certified. TID# 40000110

Operating Temperature Range: 0°C to +70°C

Advanced Peripherals (enCoRe™ III Blocks)

6 Analog enCoRe III Blocks provide:
• Up to 14-bit Incremental and Delta-Sigma ADCs

Programmable Threshold Comparator

4 Digital enCoRe III Blocks provide:
• 8-bit and 16-bit PWMs, timers and counters
• I

2

C Master

• SPI Master or Slave
• Full Duplex UART
• CYFISNP and CYFISPI modules to talk to Cypress CYFI

radio

Complex Peripherals by Combining Blocks

Full-Speed USB (12 Mbps)

Four Unidirectional Endpoints

One Bidirectional Control Endpoint

Dedicated 256 Byte Buffer

No External Crystal Required

Operational at 3.0V – 3.6V or 4.35V – 5.25V

Flexible On-Chip Memory

16K Flash Program Storage 50,000 Erase/Write Cycles

1K SRAM Data Storage

In-System Serial Programming (ISSP)

Partial Flash Updates

Flexible Protection Modes

EEPROM Emulation in Flash

Programmable Pin Configurations

25-mA Sink on all GPIO

Pull up, Pull down, High- Z, Strong, or Open Drain Drive
Modes on all GPIO

Configurable Interrupt on all GPIO

Precision, Programmable Clocking

Internal ±4% 24 and 48 MHz Oscillator

Internal Oscillator for Watchdog and Sleep

0.25% Accuracy for USB with no External Components

Additional System Resources

I

2

C

Slave, Master, and Multi-Master to 400 kHz

Watchdog and Sleep Timers

User-Configurable Low Voltage Detection

Integrated Supervisory Circuit

On-Chip Precision Voltage Reference

Complete Development Tools

Free Development Software (PSoC

®

Designer

)

Full-Featured, In-Circuit Emulator and Programmer

Full Speed Emulation

Complex Breakpoint Structure

128K Bytes Trace Memory

enCoRe III Core

Block Diagram

[+] Feedback

[+] Feedback

"Loading the manual" means you need to wait until the file loads and becomes available for online reading. Some manuals are very large, and the time they take to appear depends on your internet speed.

Summary

Page 2 - Figure; enCoRe III Core; Figure 1. Digital System Block Diagram

CY7C64215 Document 38-08036 Rev. *C Page 2 of 30 Applications ■ PC HID devices ❐ Mouse (Optomechanical, Optical, Trackball) ❐ Keyboards ❐ Joysticks ■ Gaming ❐ Game Pads ❐ Console Keyboards ■ General Purpose ❐ Barcode Scanners ❐ POS Terminal ❐ Consumer Electronics ❐ Toys ❐ Remote Controls ❐ USB to Se...

Page 3 - The Analog System; Figure 2; Figure 2. Analog System Block Diagram; The Analog Multiplexer System; Additional System Resources; Getting Started; Table 1. enCoRe III Device Characteristics; Part

CY7C64215 Document 38-08036 Rev. *C Page 3 of 30 The Analog System The Analog System is composed of six configurable blocks,comprised of an opamp circuit allowing the creation of complexanalog signal flows. Analog peripherals are very flexible and arecustomized to support specific application requir...

Page 4 - Development Kits; Development Tools; Figure 3. PSoC Designer Subsystems; PSoC Designer Software Subsystems; Device Editor; PSoC

CY7C64215 Document 38-08036 Rev. *C Page 4 of 30 with detailed programming information, reference the PSoC™ Mixed-Signal Array Technical Reference Manual . For up-to-date Ordering, Packaging, and Electrical Specificationinformation, reference the latest enCoRe III device data sheetson the web at htt...

Other Cypress Models

All Cypress Other