Cypress CY7C107BN - Manual
Cypress CY7C107BN – Manual, read for free online in PDF format. We hope this helps you resolve any issues you may have. If you have further questions, please contact us through the contact form.
Table of Contents:
- Page 2 – CC; Electrical Characteristics
- Page 3 – Parameter
- Page 4 – Switching Waveforms
- Page 5 – Truth Table; OUT; Ordering Information
- Page 6 – Package Diagrams; DIMENSIONS IN INCHES
- Page 7 – Document History Page; Issue; See ECN
1M x 1 Static RAM
CY7C107BN
CY7C1007BN
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Document #: 001-06426 Rev. **
Revised February 1, 2006
Features
• High speed
— t
AA
= 15 ns
• CMOS for optimum speed/power
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
Functional Description
The CY7C107BN and CY7C1007BN are high-performance
CMOS static RAMs organized as 1,048,576 words by 1 bit.
Easy memory expansion is provided by an active LOW Chip
Enable (CE) and three-state drivers. These devices have an
automatic power-down feature that reduces power
consumption by more than 65% when deselected.
Writing to the devices is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the input pin
(D
IN
) is written into the memory location specified on the
address pins (A
0
through A
19
).
Reading from the devices is accomplished by taking Chip
Enable (CE) LOW while Write Enable (WE) remains HIGH.
Under these conditions, the contents of the memory location
specified by the address pins will appear on the data output
(D
OUT
) pin.
The output pin (D
OUT
) is placed in a high-impedance state
when the device is deselected (CE HIGH) or during a write
operation (CE and WE LOW).
The CY7C107BN is available in a standard 400-mil-wide SOJ;
the CY7C1007BN is available in a standard 300-mil-wide SOJ
Logic Block Diagram
Pin Configuration
Top View
SOJ
512 x 2048
ARRAY
A
5
A
6
A
7
COLUMN
DECODER
R
O
W DECODER
SENSE AMPS
POWER
DOWN
WE
CE
INPUT BUFFER
D
OUT
D
IN
A
4
A
3
A
2
A
1
A
0
1
2
3
4
5
6
7
8
9
10
11
14
15
16
20
19
18
17
21
24
23
22
12
13
25
28
27
26
GND
A
11
A
12
A
13
A
14
WE
V
CC
A
9
A
10
CE
A
0
D
OUT
D
IN
A
8
A
7
A
6
A
2
A
1
A
4
NC
NC
A
15
A
16
A
8
A
12
A
14
A
16
A
15
A
10
A
11
A
13
A
17
A
18
A
19
A
17
A
18
A
19
A
5
A
3
A
9
Selection Guide
7C107BN-15
7C1007BN-15
Maximum Access Time (ns)
15
Maximum Operating Current (mA)
80
Maximum CMOS Standby Current I
SB2
(mA)
2
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Summary
CY7C107BN CY7C1007BN Document #: 001-06426 Rev. ** Page 2 of 7 Maximum Ratings (Above which the useful life may be impaired. For user guide-lines, not tested.) Storage Temperature .................................. -65°C to +150°C Ambient Temperature withPower Applied ..................................
CY7C107BN CY7C1007BN Document #: 001-06426 Rev. ** Page 3 of 7 AC Test Loads and Waveforms Switching Characteristics [5] Over the Operating Range 7C107BN-15 7C1007BN-15 Parameter Description Min. Max. Unit READ CYCLE t RC Read Cycle Time 15 ns t AA Address to Data Valid 15 ns t OHA Data Hold from Ad...
CY7C107BN CY7C1007BN Document #: 001-06426 Rev. ** Page 4 of 7 Switching Waveforms Read Cycle No. 1 [10, 11] Read Cycle No. 2 [11, 12] Write Cycle No. 1 (CE Controlled) [13] Notes: 9. No input may exceed V CC + 0.5V. 10. Device is continuously selected, CE = V IL . 11. WE is HIGH for read cycle. 12....
