Cypress CY7C1024DV33 - Manual
Cypress CY7C1024DV33 – Manual, read for free online in PDF format. We hope this helps you resolve any issues you may have. If you have further questions, please contact us through the contact form.
Table of Contents:
- Page 2 – Selection Guide; Description; Pin Configuration
- Page 3 – DC Electrical Characteristics
- Page 4 – AC Switching Characteristics; GND
- Page 6 – Switching Waveforms
- Page 7 – Truth Table
- Page 8 – Ordering Information; Industrial; Package Diagram
- Page 9 – Document History Page; Worldwide Sales and Design Support; Change
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Document Number: 001-08353 Rev. *C
Revised November 6, 2008
CY7C1024DV33
3-Mbit (128K X 24) Static RAM
Features
■
High speed
❐
t
AA
= 10 ns
■
Low active power
❐
I
CC
= 175 mA at 10 ns
■
Low CMOS standby power
❐
I
SB2
= 25 mA
■
Operating voltages of 3.3 ± 0.3V
■
2.0V data retention
■
Automatic power down when deselected
■
TTL compatible inputs and outputs
■
Easy memory expansion with CE
1
, CE
2
, and CE
3
features
■
Available in Pb-free standard 119-ball PBGA
Functional Description
The CY7C1024DV33 is a high performance CMOS static RAM
organized as 128K words by 24 bits. This device has an
automatic power down feature that significantly reduces power
consumption when deselected.
To write to the device, enable the chip (CE
1
LOW, CE
2
HIGH,
and CE
3
LOW), while forcing the Write Enable (WE) input LOW.
To read from the device, enable the chip by taking CE
1
LOW, CE
2
HIGH, and CE
3
LOW while forcing the Output Enable (OE) LOW
and the Write Enable (WE) HIGH. See the
7 for a complete description of Read and Write modes.
The 24 I/O pins (I/O
0
to I/O
23
) are placed in a high impedance
state when the device is deselected (CE
1
HIGH, CE
2
LOW, or
CE
3
HIGH) or when the output enable (OE) is HIGH during a
write operation. (CE
1
LOW, CE
2
HIGH, CE
3
LOW, and WE
LOW).
Logic Block Diagram
COLUMN
DECODER
RO
W DECODER
SE
N
S
E AM
P
S
INPUT BUFFER
128K x 24
ARRAY
I/O
0
– I/O
23
OE
CE
1
, CE
2
, CE
3
WE
CONTROL LOGIC
A
(9:0)
A
(16:10)
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Summary
CY7C1024DV33 Document Number: 001-08353 Rev. *C Page 2 of 9 Selection Guide Description –10 Unit Maximum Access Time 10 ns Maximum Operating Current 175 mA Maximum CMOS Standby Current 25 mA Pin Configuration Figure 1. 119-Ball PBGA Top View [1] 1 2 3 4 5 6 7 A NC A A A A A NC B NC A A CE 1 A A NC C...
CY7C1024DV33 Document Number: 001-08353 Rev. *C Page 3 of 9 Maximum Ratings Exceeding maximum ratings may impair the useful life of thedevice. These user guidelines are not tested. Storage Temperature ................................. –65 ° C to +150 ° C Ambient Temperature withPower Applied ..........
CY7C1024DV33 Document Number: 001-08353 Rev. *C Page 4 of 9 Figure 2. AC Test Loads and Waveform [4] AC Switching Characteristics Over the Operating Range [5] Parameter Description –10 Unit Min Max Read Cycle t power [6] V CC (Typical) to the First Access 100 μ s t RC Read Cycle Time 10 ns t AA Addr...
