Cypress CY14E108N - Manual
Cypress CY14E108N – Manual, read for free online in PDF format. We hope this helps you resolve any issues you may have. If you have further questions, please contact us through the contact form.
Table of Contents:
- Page 2 – ADVANCE; Pinouts; Top View; Top View; Top View
- Page 3 – Pin Definitions
- Page 4 – Device Operation; Figure 3; Figure 3. AutoStore Mode; Hardware STORE Operation
- Page 5 – Software STORE; Software RECALL
- Page 6 – Preventing AutoStore; Noise Considerations
- Page 7 – Maximum Ratings; DC Electrical Characteristics
- Page 8 – AC Test Conditions; In the following table, the capacitance parameters are listed; Input Capacitance; pF; Output Capacitance; Thermal Resistance; OUTPUT
- Page 9 – AC Switching Characteristics
- Page 10 – AutoStore and Power Up RECALL; Switching Waveforms
- Page 12 – Figure 9. AutoStore or Power Up RECALL
- Page 13 – Figure 10. CE Controlled Software STORE/RECALL Cycle
- Page 14 – Figure 12. Hardware STORE Cycle
- Page 15 – Ordering Information
- Page 16 – Part Numbering Nomenclature
- Page 17 – Package Diagrams; TOP VIEW
- Page 20 – Document History Page; Worldwide Sales and Design Support; Submission
ADVANCE
CY14E108L, CY14E108N
8 Mbit (1024K x 8/512K x 16) nvSRAM
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Document Number: 001-45524 Rev. *A
Revised June 24, 2008
Features
■
20 ns, 25 ns, and 45 ns access times
■
Internally organized as 1024K x 8 (CY14E108L) or 512K x 16
(CY14E108N)
■
Hands off automatic STORE
on power down with only a small
capacitor
■
STORE
to QuantumTrap
®
nonvolatile elements initiated by
software, device pin, or AutoStore
®
on power down
■
RECALL
to SRAM initiated by software or power up
■
Infinite read, write, and recall cycles
■
200,000 STORE
cycles to QuantumTrap
■
20 year data retention
■
Single 5V +10% operation
■
Commercial and industrial temperatures
■
48-pin FBGA, 44 and 54-pin TSOP II packages
■
Pb-free and RoHS compliance
Functional Description
The Cypress CY14E108L/CY14E108N is a fast static RAM, with
a nonvolatile element in each memory cell. The memory is
organized as 1024K words of 8 bits each or 512K words of 16
bits each. The embedded nonvolatile elements incorporate
QuantumTrap
technology, producing the world’s most reliable
nonvolatile memory. The SRAM provides infinite read and write
cycles, while independent nonvolatile data resides in the highly
reliable QuantumTrap cell. Data transfers from the SRAM to the
nonvolatile elements (the STORE operation) takes place
automatically at power down. On power up, data is restored to
the SRAM (the RECALL operation) from the nonvolatile memory.
Both the STORE and RECALL operations are also available
under software control.
A
0
- A
19
Address
WE
OE
CE
V
CC
V
SS
V
CAP
DQ0 - DQ7
HSB
CY14E108L
BHE
BLE
Logic Block Diagram
[1]
CY14E108N
Note
1. Address A
0
- A
19
and Data DQ0 - DQ7 for x8 configuration, Address A
0
- A
18
and Data DQ0 - DQ15 for x16 configuration.
"Loading the manual" means you need to wait until the file loads and becomes available for online reading. Some manuals are very large, and the time they take to appear depends on your internet speed.
Summary
ADVANCE CY14E108L, CY14E108N Document Number: 001-45524 Rev. *A Page 2 of 20 Pinouts Figure 1. Pin Diagram - 48 FBGA Figure 2. Pin Diagram - 44/54 TSOP II WE V CC A 11 A 10 V CAP A 6 A 0 A 3 CE NC NC DQ0 A 4 A 5 NC DQ2 DQ3 NC V SS A 9 A 8 OE V SS A 7 NC NC NC A 17 A 2 A 1 NC V CC DQ4 NC DQ5 DQ6 NC D...
ADVANCE CY14E108L, CY14E108N Document Number: 001-45524 Rev. *A Page 3 of 20 Pin Definitions Pin Name IO Type Description A 0 – A 19 Input Address Inputs Used to Select One of the 1,048,576 bytes of the nvSRAM for x8 Configuration . A 0 – A 18 Address Inputs Used to Select One of the 524, 288 bytes ...
ADVANCE CY14E108L, CY14E108N Document Number: 001-45524 Rev. *A Page 4 of 20 Device Operation The CY14E108L/CY14E108N nvSRAM is made up of twofunctional components paired in the same physical cell. They arean SRAM memory cell and a nonvolatile QuantumTrap cell. TheSRAM memory cell operates as a stan...
