Cypress AN1196 - Manual
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Table of Contents:
- Page 2 – Figure 2. FX2 Eye Diagram of High-speed Signaling; EZ-USB FX2 Device Supply Decoupling; Table 1; EMI and ESD Considerations; PCB Design Recommendation; Table 1. Capacitor Recommendation
- Page 3 – Maintain PCB Trace Impedance; Table 3; Zdiff; Figure 3; Z d i f f
- Page 4 – Split Planes and Signal Routing; Figure 4; Thermal Design Considerations
- Page 6 – Summary
- Page 7 – References
November 21, 2002
Document No. 001-43117 Rev. **
1
EZ-USB FX2™ PCB
Design Recommendations
Introduction
This application note presents recommendations for design-
ing with the Cypress Semiconductor EZ-USB FX2™ compo-
nent. Techniques for high-speed design should be applied to
circuits using the EZ-USB FX2. Due to the packaging and
high performance characteristics of the EZ-USB FX2, consid-
eration of the PCB thermal design is required.
CY4611 EZ-USB FX2 USB to ATA Reference
Design
A complete design using the Cypress CY7C68013 EZ-USB
FX2 is available. The design implements the recommenda-
tions of this application note. It may be useful for the reader to
download the CY4611 Reference Design Files from the
Cypress Support page for Reference Designs.
Figure 1. FX2 (CY4611) USB to ATA Reference Design
Cypress offers the CY4611 EZ-USB FX2 USB to ATA Refer-
ence Design as an evaluation platform for developers wishing
to integrate a USB 2.0 Peripheral Controller into their applica-
tion. The kit includes the EZ-USB FX2 USB to ATA evaluation
board, USB cable, schematics, bill of material, PCB Gerber
files, and other documentation.
EZ-USB FX2 Package Description
The CY7C68013-56LFC EZ-USB FX2 component is pack-
aged as a 56-pad, 8-mm by 8-mm, 1-mm high, QFN (Quad
Flatpack No leads) package. Please refer to the latest
CY7C68013 EZ-USB FX2 USB Microcontroller High-speed
USB Peripheral Controller data sheet for the detailed pack-
age drawing. The data sheet is Cypress specification 38-
08012.
This package is comparable to the Amkor MicroLeadFrame™
package. It is a plastic encapsulated, near-chip scale pack-
age using solder lands instead of leads or balls. It uses a cop-
per leadframe substrate that provides for short die to frame
lead length giving good high-frequency performance. It has
an exposed die paddle that enables good thermal transfer out
of the package. For further details about this package and
methods and processes associated with its assembly to a
printed circuit board, please refer to the manufacturer's appli-
cation note identified in the References section of this docu-
ment.
Electrical Design Recommendations
USB 2.0 high-speed signaling is used to transfer data at 480
Mbps. This rate is 40 times higher than the highest speed of
the USB 1.1 specification, full-speed signaling that operates
at a 12-Mbps rate. High-speed signaling requires a greater
level of attention to electrical design than previously required
for USB designs. Careful attention to component selection,
supply decoupling, signal line impedance, and noise are
required when designing for high-speed USB. These physical
issues are mostly effected by the PCB design and is pre-
sented in the
section.
One key measurement of USB data signal quality is the eye
pattern. The eye pattern is a representation of USB signaling
that provides minimum and maximum voltage levels as well
as signal jitter. Section 7.1 in the USB 2.0 Specification pro-
vides detailed explanation and requirements for a compliant
eye pattern.
is an eye diagram of high-speed signal-
ing as measured on the EZ-USB FX2 component.
AN1196
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Summary
November 21, 2002 Document No. 001-43117 Rev. ** 2 AN1196 Figure 2. FX2 Eye Diagram of High-speed Signaling In the diagram, notice how no signal traces overlap the cen-tral, six-sided, shaded area. Also, no trace overlaps theextremes of permissible voltage as shown in the shaded linesat the very top...
November 21, 2002 Document No. 001-43117 Rev. ** 3 AN1196 Maintain PCB Trace Impedance Designing the PCB traces for particular characteristic imped-ance is very important to signal quality. The USB specificationrequires controlled impedance among all elements in theUSB data path. The differential im...
November 21, 2002 Document No. 001-43117 Rev. ** 4 AN1196 This figure shows the dielectric material thickness (“Prepreg”)between layers 1 and 2 and the thickness between layers 3and 4. The dimensions between these layers are a key ele-ment in the design to set the proper characteristic impedancefor ...
